AD7237A/AD7247A

REV. 0

–5–

AD7247A PIN FUNCTION DESCRIPTION (DIP PIN NUMBERS)

Pin

Mnemonic

Description

1

REF OUT

Voltage Reference Output. The internal 5 V analog reference is provided at this pin. To operate the part

with internal reference, REF OUT should be connected to REF IN.

Output Offset Resistor for DAC B. This input configures the output ranges for DAC B. It is connected to

Analog Output Voltage from DAC B. This is the buffer amplifier output voltage. Three different output

voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and

±5 V. The amplifier is capable of developing

+10 V across a 2 k

Ω resistor to GND.

4

DB11

Data Bit 11 (MSB).

5

DB10

Data Bit 10.

6

GND

Ground. Ground reference for all on-chip circuitry.

7–15

DB9-DB1

Data Bit 9 to Data Bit 1.

16

DB0

Data Bit 0 (LSB).

17

CSB

Chip Select Input for DAC B. Active low logic input. DAC B is selected when this input is active.

18

CSA

Chip Select Input for DAC A. Active low logic input. DAC A is selected when this input is active.

19

WR

Write Input. WR is an active low logic input which is used in conjunction with CSA and CSB to write data

to the DAC latches.

20

Positive Supply (+12 V to +15 V).

21

Analog Output Voltage from DAC A. This is the buffer amplifier output voltage. Three different output

voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and

±5 V. The amplifier is capable of developing

+10 V across a 2 k

Ω resistor to GND.

22

Negative Supply (0 V or –12 V to –15 V).

23

Output Offset Resistor for DAC A. This input configures the output ranges for DAC A. It is connected to

±5 V range.

24

REF IN

Voltage Reference Input. The common reference voltage for both DACs is applied to this pin. It is internally

buffered before being applied to both DACs. The nominal reference voltage for correct operation of the

AD7247A is 5 V.

AD7237A PIN CONFIGURATION

DIP and SOIC

AD7247A PIN CONFIGURATION

DIP and SOIC