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AD7864BS-1 데이터시트(PDF) 9 Page - Analog Devices

부품명 AD7864BS-1
상세설명  4-Channel, Simultaneous Sampling, High Speed, 12-Bit ADC
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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AD7864BS-1 데이터시트(HTML) 9 Page - Analog Devices

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AD7864
–9–
REV. A
AD7864-1
Figure 2 shows the analog input section of the AD7864-1. Each
input can be configured for
±5 V or ±10 V operation on the
AD7864-1. For
±5 V (AD7864-1) operation, the V
INXA and
VINXB inputs are tied together and the input voltage is applied to
both. For
±10 V (AD7864-1) operation, the V
INXB input is tied
to AGND and the input voltage is applied to the VINXA input.
The VINXA and VINXB inputs are symmetrical and fully inter-
changeable. Thus for ease of PCB layout on the
±10 V range,
the input voltage may be applied to the VINXB input while the
VINXA input is tied to AGND.
2.5V
REFERENCE
T/H
TO ADC
REFERENCE
CIRCUITRY
6k
R2
R3
TO INTERNAL
COMPARATOR
AD7864-1
R1
R4
AGND
VIN1B
VIN1A
VREF
Figure 2. AD7864-1 Analog Input Structure
For the AD7864-1, R1 = 6 k
Ω, R2 = 24 kΩ, R3 = 24 kΩ and
R4 = 12 k
Ω. The resistor input stage is followed by the high
input impedance stage of the track/hold amplifier.
The designed code transitions take place midway between suc-
cessive integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs
etc.) LSB size is given by the formula, 1 LSB = FSR/4096. For
the
±5 V range, 1 LSB = 10 V/4096 = 2.44 mV. For the ±10 V
range, 1 LSB = 20 V/4096 = 4.88 mV. Output coding is twos
complement binary with 1 LSB = FSR/4096. The ideal input/
output transfer function for the AD7864-1 is shown in Table I.
Table I. Ideal Input/Output Code Table for the AD7864-1
Analog Input
l
Digital Output Code Transition
+FSR/2 – 3/2 LSB2
011 . . . 110 to 011 . . . 111
+FSR/2 – 5/2 LSB
011 . . . 101 to 011 . . . 110
+FSR/2 – 7/2 LSB
011 . . . 100 to 011 . . . 101
AGND + 3/2 LSB
000 . . . 001 to 000 . . . 010
AGND + 1/2 LSB
000 . . . 000 to 000 . . . 001
AGND – 1/2 LSB
111 . . . 111 to 000 . . . 000
AGND – 3/2 LSB
111 . . . 110 to 111 . . . 111
–FSR/2 + 5/2 LSB
100 . . . 010 to 100 . . . 011
–FSR/2 + 3/2 LSB
100 . . . 001 to 100 . . . 010
–FSR/2 + 1/2 LSB
100 . . . 000 to 100 . . . 001
NOTES
1FSR is full-scale range and is 20 V for the
± 10 V range and 10 V for the ±5 V
range, with VREF = +2.5 V.
21 LSB = FSR/4096 = 4.883 mV (
±10 V—AD7864-1) and 2.441 mV (± 5 V—
AD7864-1) with VREF = +2.5 V.
AD7864-2
Figure 3 shows the analog input section of the AD7864-2. Each
input can be configured for 0 V to +5 V operation or 0 V to
+2.5 V operation. For 0 V to +5 V operation, the VINXB input is
tied to AGND and the input voltage is applied to the VINXA
input. For 0 V to 2.5 V operation, the VINXA and VINXB inputs
are tied together and the input voltage is applied to both. The
VINXA and VINXB inputs are symmetrical and fully interchange-
able. Thus for ease of PCB layout on the 0 V to +5 V range, the
input voltage may be applied to the VINXB input while the VINXA
input is tied to AGND.
For the AD7864-2, R1 = 6 k
Ω and R2 = 6 kΩ. Once again, the
designed code transitions occur on successive integer LSB
values. Output coding is straight (natural) binary with 1 LSB =
FSR/4096 = 2.5 V/4096 = 0.61 mV, and 5 V/4096 = 1.22 mV,
for the 0 V to 2.5 V and the 0 V to 5 V options respectively.
Table II shows the ideal input and output transfer function for
the AD7864-2.
2.5V
REFERENCE
T/H
TO ADC
REFERENCE
CIRCUITRY
6k
R2
TO INTERNAL
COMPARATOR
AD7864-2
R1
VIN1B
VIN1A
VREF
Figure 3. AD7864-2 Analog Input Structure
Table II. Ideal Input/Output Code Table for the AD7864-2
Analog Input1
Digital Output Code Transition
+FSR – 3/2 LSB
2
111 . . . 110 to 111 . . . 111
+FSR – 5/2 LSB
111 . . . 101 to 111 . . . 110
+FSR – 7/2 LSB
111 . . . 100 to 111 . . . 101
AGND + 5/2 LSB
000 . . . 010 to 000 . . . 011
AGND + 3/2 LSB
000 . . . 001 to 000 . . . 010
AGND + 1/2 LSB
000 . . . 000 to 000 . . . 001
NOTES
1FSR is full-scale range and is 0 V to 2.5 V and 0 V to 5 V for AD7864-2 with
VREF = +2.5 V.
21 LSB = FSR/4096 and is 0.61 mV (0 V to 2.5 V) and 1.22 mV (0 V to 5 V) for
AD7864-2 with VREF = +2.5 V.


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