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AD7895AR-2 데이터시트(PDF) 11 Page - Analog Devices |
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AD7895AR-2 데이터시트(HTML) 11 Page - Analog Devices |
11 / 12 page AD7895 –11– REV. 0 Dynamic Performance (Mode 1 Only) With a combined conversion and acquisition time of 4.1 µs, the AD7895 is ideal for wide bandwidth signal processing applica- tions. These applications require information on the ADC’s effect on the spectral content of the input signal. Signal to (Noise + Distortion), Total Harmonic Distortion, Peak Har- monic or Spurious Noise, and Intermodulation Distortion are all specified. Figure 11 shows a typical FFT plot of a 10 kHz, 0 V to +5 V input after being digitized by the AD7895 operating at a 198.656 kHz sampling rate. The Signal to (Noise + Distor- tion) Ratio is 73.04 dB, and the Total Harmonic Distortion is –84.91 dB. The formula for Signal to (Noise + Distortion) Ratio (see Terminology section) is related to the resolution or number of bits in the converter. Rewriting the formula, below, gives a measure of performance expressed in effective number of bits (N): N = (SNR 1.76)/6.02 where SNR is Signal to (Noise + Distortion) Ratio. –0 –120 0 9.9k 10k 30k 50k 70k 90k –20 –40 –60 –80 –100 –10 –30 –50 –70 –90 –110 FSAMPLE = 198656 FIN = 10kHz SNR = –73.04dB THD = –84.91dB Figure 11. AD7896 FFT Plot Effective Number of Bits The effective number of bits for a device can be calculated from its measured Signal to (Noise + Distortion) Ratio. Figure 12 shows a typical plot of effective number of bits versus frequency for the AD7895 from dc to fSAMPLING/2. The sampling frequency is 198.656 kHz. The plot shows that the AD7895 converts an input sine wave of 10 kHz to an effective numbers of bits of 11.84, which equates to a Signal to (Noise + Distortion) level of 73.04 dB. 0 1000 200 400 600 800 10.0 11.4 11.2 11.0 10.8 11.8 11.6 12.0 10.6 10.4 FREQUENCY – kHz 10.2 Figure 12. Effective Number of Bits vs. Frequency Power Considerations In the automatic power-down mode, then, the part may be operated at a sample rate that is considerably less than 100 kHz. In this case, the power consumption will be reduced and will depend on the sample rate. Figure 13 shows a graph of the power consumption versus sampling rates from 100 Hz to 90 kHz in the automatic power-down mode. The conditions are 5 V supply 25 °C, serial clock frequency of 8.33 MHz, and the data was read after conversion. 0.1 90 10 20 30 40 0 5 4 3 2 7 6 8 1 FREQUENCY – kHz 50 60 70 80 10 9 11 Figure 13. Power vs. Sample Rate in Auto Power-Down Mode |
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