전자부품 데이터시트 검색엔진 |
|
AD8561AR 데이터시트(PDF) 8 Page - Analog Devices |
|
AD8561AR 데이터시트(HTML) 8 Page - Analog Devices |
8 / 11 page AD8561 –8– REV. 0 INPUT STAGE AND BIAS CURRENTS The AD8561 uses a PNP differential input stage that enables the input common-mode range to extend all the way from the negative supply rail to within 2.2 V of the positive supply rail. The input common-mode voltage can be found as the average of the voltage at the two inputs of the device. To ensure the fastest response time, care should be taken not to allow the input common-mode voltage to exceed either of these voltages. The input bias current for the AD8561 is 3 µA. As with any PNP differential input stage, this bias current will go to zero on an input that is high and will double on an input that is low. Care should be taken in choosing resistor values to be con- nected to the inputs as large resistors could cause significant voltage drops due to the input bias current. The input capacitance for the AD8561 is typically 3 pF. This is measured by inserting a 5 k Ω source resistance to the input and measuring the change in propagation delay. USING HYSTERESIS Hysteresis can easily be added to a comparator through the addition of positive feedback. Adding hysteresis to a comparator offers an advantage in noisy environments where it is not desir- able for the output to toggle between states when the input signal is near the switching threshold. Figure 17 shows a method for configuring the AD8561 with hysteresis. VREF R1 SIGNAL COMPARATOR R2 CF Figure 17. Configuring the AD8561 with Hysteresis The input signal is connected directly to the noninverting input of the comparator. The output is fed back to the inverting input through R1 and R2. The ratio of R1 to R1 + R2 establishes the width of the hysteresis window with VREF setting the center of the window, or the average switching voltage. The Q output will switch high when the input voltage is greater than VHI and will not switch low again until the input voltage is less than VLO as given in Equation 1: V HI = V + –1–V REF () R1 R1 + R2 +V REF V LO =V REF 1– R1 R1 + R2 (1) Where V+ is the positive supply voltage. The capacitor CF can also be added to introduce a pole into the feedback network. This has the effect of increasing the amount of hysteresis at high frequencies. This can be useful when com- paring a relatively slow signal in a high frequency noise environ- ment. At frequencies greater than fP = 1 2 π C F R2 , the hysteresis window approaches VHI = V+ – 1 V and VLO = 0 V. At frequen- cies less than fP the threshold voltages remain as in Equation 1. |
유사한 부품 번호 - AD8561AR |
|
유사한 설명 - AD8561AR |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |