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AD8598ARU 데이터시트(PDF) 7 Page - Analog Devices

부품명 AD8598ARU
상세설명  Dual 7 ns Single Supply Comparator
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AD8598
–7–
REV. A
APPLICATIONS
Optimizing High Speed Performance
As with any high speed comparator or amplifier, proper design
and layout techniques should be used to ensure optimal perfor-
mance from the AD8598. The performance limits of high speed
circuitry can easily be a result of stray capacitance, improper
ground impedance or other layout issues.
Minimizing resistance from source to the input is an important
consideration in maximizing the high speed operation of the
AD8598. Source resistance in combination with equivalent
input capacitance could cause a lagged response at the input,
thus delaying the output. The input capacitance of the AD8598,
in combination with stray capacitance from an input pin to
ground could result in several picofarads of equivalent capaci-
tance. A combination of 3 k
Ω source resistance and 5 pF of
input capacitance yields a time constant of 15 ns, which is
slower than the 5 ns capability of the AD8598. Source imped-
ances should be less than 1 k
Ω for the best performance.
It is also important to provide bypass capacitors for the power
supply in a high speed application. A 1
µF electrolytic bypass
capacitor should be placed within 0.5 inches of each power
supply pin to ground. These capacitors will reduce any potential
voltage ripples from the power supply. In addition, a 10 nF
ceramic capacitor should be placed as close as possible from the
power supply pins to ground. These capacitors act as a charge
reservoir for the device during high frequency switching.
A ground plane is recommended for proper high speed perfor-
mance. This can be created by using a continuous conductive
plane over the surface of the circuit board, only allowing breaks in
the plane for necessary current paths. The ground plane provides
a low inductance ground, eliminating any potential differences at
different ground points throughout the circuit board caused from
“ground bounce.” A proper ground plane also minimizes the
effects of stray capacitance on the circuit board.
Replacing the MAX912
The AD8598 is pin compatible with the MAX912 comparator.
While it is easy to replace the MAX912 with the higher perfor-
mance AD8598, please note that there are differences, and it is
useful to check these to ensure proper operation.
There are five major differences between the AD8598 and the
MAX912; input voltage range, input bias currents, speed, out-
put swing and power consumption.
When operated on a +5 V single supply, the MAX912 has an
input voltage range from –0.2 V to +3.5 V. The AD8598 has an
input range from 0 V to +3.0 V. Signals above +3.0 V may
result in slower response times (see Figure 8). If both signals
exceed +3.0 V, the signals may be shifted or attenuated to bring
them into range, keeping in mind the note about source resis-
tance in Optimizing High Speed Performance. If only one of the
signals exceeds +3.0 V only slightly, and the other signal is
always well within the 0 V to +3 V range, the comparator may
operate without changes to the circuit.
Example: A comparator compares a fast moving signal to a fixed
+2.5 V reference. Since the comparator only needs to operate
when the signal is near +2.5 V, both signals will be within the
input range (near +2.5 V and well under +3.0 V) when the
comparator needs to change output.
Note that signals much greater than +3.0 V will result in increased
input currents and may cause the device to operate more slowly.
The input bias current of the AD8598 is the same magnitude
(–3
µA typical) as the MAX912 (+3 µA typical), and the cur-
rent flows out of the AD8598 and into MAX912. If relatively
low value resistors and/or low impedance sources are used on
the inputs, the voltage shift due to bias current should be small.
The AD8598 (6.75 ns typical) is faster than the MAX912
(10 ns typical). While this is beneficial to many systems, timing
may need to be adjusted to take advantage of the higher speed.
The AD8598 has slightly more output voltage swing when the
output is lightly loaded.
The AD8598 uses less current (typically 10 mA) than the MAX912
(typically 12 mA).
Increasing Output Swing
Although not required for normal operation, the output voltage
swing of the AD8598 can be increased by connecting a 5 k
resistor from the output of the device to the V+ power supply.
This configuration can be useful in low voltage power supply
applications where maximizing output voltage swing is impor-
tant. Adding a 5 k
Ω pull-up resistor to the device’s output will
not adversely affect the specifications of the AD8598.
Output Loading Considerations
The AD8598 output can deliver up to 40 mA of output current
without any significant increase in propagation delay. The
output of the device should not be connected to more than
twenty (20) TTL input logic gates, nor drive a load resistance
less than 100
Ω.
To ensure the best performance from the AD8598 it is impor-
tant to minimize capacitive loading of the output of the device.
Capacitive loads greater than 50 pF will cause ringing on the
output waveform and will reduce the operating bandwidth of
the comparator.
Setup and Hold Times for Latching the Output
The latch inputs can be used to retain data at the outputs of the
AD8598. When the voltage at the latch input goes high, the
output of the device will remain constant regardless of the input
voltages. The setup time for the latch is 2 ns–3 ns and the hold
time is 3 ns. This means that to ensure data retention at the
output, the input signal must be valid at least 5 ns before the
latch pin goes high and must remain valid at least 3 ns after the
latch pin goes high. Once the latch input voltage goes low, new
output data will appear in approximately 8 ns.
A logic high for the latch input is a minimum of +2.0 V and a
logic low is a maximum of +0.8 V. This makes the latch input
easily interface with TTL or CMOS logic gates. The latch
circuitry in the AD8598 has no built-in hysteresis.
Input Stage and Bias Currents
The AD8598 uses a PNP differential input stage that enables
the input common-mode range to extend all the way from the
negative supply rail to within +2.2 V of the positive supply rail.
The input common-mode voltage can be found as the average
of the voltage at the two inputs of the device. To ensure the
fastest response time, care should be taken not to allow the
input common-mode voltage to exceed either of these voltages.


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