전자부품 데이터시트 검색엔진 |
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ADV7122 데이터시트(PDF) 8 Page - Analog Devices |
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ADV7122 데이터시트(HTML) 8 Page - Analog Devices |
8 / 12 page ADV7121/ADV7122 –8– REV. B If we, therefore, have a graphics system with a 1024 × 1024 resolution, a noninterlaced 60 Hz refresh rate and a retrace fac- tor of 0.8, then: Dot Rate = 1024 × 1024 × 60/0.8 = 78.6 MHz The required CLOCK frequency is thus 78.6 MHz. All video data and control inputs are latched into the ADV7121/ ADV7122 on the rising edge of CLOCK, as previously de- scribed in the “Digital Inputs” section. It is recommended that the CLOCK input to the ADV7121/ADV7122 be driven by a TTL buffer (e.g., 74F244). 92.5 IRE 7.5 IRE 40 IRE WHITE LEVEL BLACK LEVEL BLANK LEVEL SYNC LEVEL 19.05 0.714 26.67 1.000 1.44 0.054 9.05 0.340 0 0 7.62 0.286 0 0 mA V mA V RED, BLUE GREEN NOTES 1. OUTPUTS CONNECTED TO A DOUBLY TERMINATED 75 Ω LOAD. 2. VREF = 1.235V, RSET = 560Ω. 3. RS–343A LEVELS AND TOLERANCES ASSUMED ON ALL LEVELS. Figure 3. RGB Video Output Waveform Table Ia. Video Output Truth Table for the ADV7122 IOG IOR, IOB DAC Description (mA)* (mA) SYNC BLANK Input Data WHITE LEVEL 26.67 19.05 1 1 3FFH VIDEO video + 9.05 video + 1.44 1 1 data VIDEO to BLANK video + 1.44 video + 1.44 0 1 data BLACK LEVEL 9.05 1.44 1 1 00H BLACK to BLANK 1.44 1.44 0 1 00H BLANK LEVEL 7.62 0 1 0 xxH SYNC LEVEL 0 0 0 0 xxH *Typical with full-scale IOG = 26.67 mA. VREF = 1.235 V, RSET = 560 Ω, ISYNC connected to IOG. Table Ib. Video Output Truth Table for the ADV7121 IOR, IOG, IOB DAC Description (mA)* Input Data WHITE LEVEL 17.62 3FF VIDEO video data VIDEO to BLACK video data BLACK LEVEL 0 00H *Typical with full scale = 17.62 mA. VREF = 1.235 V, RSET = 560 Ω. |
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