전자부품 데이터시트 검색엔진 |
|
TMP01FJ2 데이터시트(PDF) 4 Page - Analog Devices |
|
TMP01FJ2 데이터시트(HTML) 4 Page - Analog Devices |
4 / 16 page TMP01 REV. C –4– WAFER TEST LIMITS Parameter Symbol Conditions Min Typ Max Units INPUTS SET HIGH, SET LOW Input Bias Current IB 100 nA OUTPUT VPTAT Temperature Accuracy TA = +25 °C, No Load 1.5 °C OUTPUT VREF Nominal Value VREF TA = +25°C, No Load 2.490 2.510 V Line Regulation 4.5 V ≤ V+ ≤ 13.2 V ±0.05 %/V Load Regulation 10 µA ≤ I VREF ≤ 500 µA ±0.25 %/mA OPEN-COLLECTOR OUTPUTS OVER, UNDER Output Low Voltage VOL ISINK = 1.6 mA 0.4 mV Output Low Voltage VOL ISINK = 20 mA 1.0 V Output Leakage Current IOH 100 µA POWER SUPPLY Supply Range V+ 4.5 13.2 V Supply Current ISY Unloaded 600 µA NOTES Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing. DICE CHARACTERISTICS Die Size 0.078 × 0.071 inch, 5,538 sq. mils (1.98 × 1.80 mm, 3.57 sq. mm) Transistor Count: 105 For additional DICE ordering information, refer to databook. 8 7 6 5 1 2 3 4 4 1. VREF 2. SETHIGH 3. SETLOW 4. GND (TWO PLACES) (CONNECTED TO SUBSTRATE) 5. VPTAT 6. UNDER 7. OVER 8. V+ (VDD = +5.0 V, GND = 0 V, TA = +25 C, unless otherwise noted) |
유사한 부품 번호 - TMP01FJ2 |
|
유사한 설명 - TMP01FJ2 |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |