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FW323 데이터시트(PDF) 4 Page - Agere Systems |
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FW323 데이터시트(HTML) 4 Page - Agere Systems |
4 / 152 page 4 4 Agere Systems Inc. FW323 05 Data Sheet, Rev. 2 1394A PCI PHY/Link Open Host Controller Interface October 2001 Table of Contents (continued) Table Page Table 1. Pin Descriptions ........................................................................................................................................14 Table 2. Bit-Field Access Tag Description ..............................................................................................................20 Table 3. PCI Configuration Register Map ...............................................................................................................20 Table 4. Vendor ID Register ...................................................................................................................................21 Table 5. Device ID Register ....................................................................................................................................22 Table 6. PCI Command Register ............................................................................................................................23 Table 7. PCI Command Register Description .........................................................................................................24 Table 8. PCI Status Register ..................................................................................................................................25 Table 9. Class Code and Revision ID Register .....................................................................................................26 Table 10. Class Code and Revision ID Register Description .................................................................................27 Table 11. Latency Timer and Class Cache Line Size Register ..............................................................................27 Table 12. Latency Timer and Class Cache Line Size Register Description ..........................................................28 Table 13. Header Type and BIST Register ............................................................................................................28 Table 14. Header Type and BIST Register Description .........................................................................................29 Table 15. OHCI Base Address Register .................................................................................................................30 Table 16. OHCI Base Address Register Description ..............................................................................................31 Table 17. PCI Subsystem Identification Register Description ................................................................................32 Table 18. PCI Power Management Capabilities Pointer Register ..........................................................................32 Table 19. Interrupt Line and Pin Register ...............................................................................................................33 Table 20. Interrupt Line and Pin Register Description ............................................................................................33 Table 21. MIN_GNT and MAX_LAT Register .........................................................................................................34 Table 22. MIN_GNT and MAX_LAT Register Description ......................................................................................34 Table 23. PCI OHCI Control Register ....................................................................................................................35 Table 24. PCI OHCI Control Register Description ..................................................................................................36 Table 25. Capability ID and Next Item Pointer Register .........................................................................................37 Table 26. Capability ID and Next Item Pointer Register Description ......................................................................37 Table 27. Power Management Capabilities Register .............................................................................................38 Table 28. Power Management Capabilities Register Description ..........................................................................39 Table 29. Power Management Control and Status Register .................................................................................40 Table 30. Power Management Control and Status Register Description ...............................................................41 Table 31. Power Management Extension Register ................................................................................................42 Table 32. Power Management Extension Register Description ............................................................................42 Table 33. OHCI Register Map ................................................................................................................................43 Table 34. OHCI Version Register ...........................................................................................................................46 Table 35. OHCI Version Register Description ........................................................................................................47 Table 36. GUID ROM Register ..............................................................................................................................48 Table 37. GUID ROM Register Description ............................................................................................................49 Table 38. Asynchronous Transmit Retries Register ..............................................................................................50 Table 39. Asynchronous Transmit Retries Register Description ............................................................................51 Table 40. CSR Data Register .................................................................................................................................52 Table 41. CSR Data Register Description ..............................................................................................................53 Table 42. CSR Compare Register ..........................................................................................................................54 Table 43. CSR Compare Register Description .......................................................................................................55 Table 44. CSR Control Register .............................................................................................................................56 Table 45. CSR Control Register Description .........................................................................................................57 Table 46. Configuration ROM Header Register ......................................................................................................58 Table 47. Configuration ROM Header Register Description ..................................................................................59 Table 48. Bus Identification Register ......................................................................................................................60 Table 49. Bus Identification Register Description ...................................................................................................61 Table 50. Bus Options Register ..............................................................................................................................62 Table 51. Bus Options Register Description ...........................................................................................................63 |
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