MMSF2P02E

6

Motorola TMOS Power MOSFET Transistor Device Data

Figure 15. Diode Reverse Recovery Waveform

di/dt

trr

ta

tp

IS

0.25 IS

TIME

IS

tb

INFORMATION FOR USING THE SO–8 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total

design. The footprint for the semiconductor packages must be

the correct size to ensure proper solder connection interface

between the board and the package. With the correct pad

geometry, the packages will self–align when subjected to a

solder reflow process.

mm

inches

0.060

1.52

0.275

7.0

0.024

0.6

0.050

1.270

0.155

4.0

SO–8 POWER DISSIPATION

The power dissipation of the SO–8 is a function of the input

pad size. This can vary from the minimum pad size for

soldering to the pad size given for maximum power

dissipation. Power dissipation for a surface mount device is

determined by TJ(max), the maximum rated junction

temperature of the die, R

θJA, the thermal resistance from the

device junction to ambient; and the operating temperature, TA.

Using the values provided on the data sheet for the SO–8

package, PD can be calculated as follows:

PD =

TJ(max) – TA

R

θJA

The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values into

the equation for an ambient temperature TA of 25°C, one can

calculate the power dissipation of the device which in this case

is 2.5 Watts.

PD =

150

°C – 25°C

50

°C/W

= 2.5 Watts

The 50

°C/W for the SO–8 package assumes the

recommended footprint on a glass epoxy printed circuit board

to achieve a power dissipation of 2.5 Watts using the footprint

shown. Another alternative would be to use a ceramic

substrate or an aluminum core board such as Thermal Clad

™.

Using board material such as Thermal Clad, the power

dissipation can be doubled using the same footprint.