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74ALVC16240 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 1 Page - Fairchild Semiconductor

๋ถ€ํ’ˆ๋ช… 74ALVC16240
์ƒ์„ธ๋‚ด์šฉ  Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs
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์ œ์กฐ์‚ฌ  FAIRCHILD [Fairchild Semiconductor]
ํ™ˆํŽ˜์ด์ง€  http://www.fairchildsemi.com
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74ALVC16240 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 1 Page - Fairchild Semiconductor

   
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ยฉ 2005 Fairchild Semiconductor Corporation
DS500689
www.fairchildsemi.com
October 2001
Revised May 2005
74ALVC16240
Low Voltage 16-Bit Inverting Buffer/Line Driver
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16240 contains sixteen inverting buffers with 3-
STATE outputs to be employed as a memory and address
driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has sep-
arate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74ALVC16240 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O capability up to 3.6V.
The 74ALVC16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.65V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
3.0 ns max for 3.0V to 3.6V VCC
3.5 ns max for 2.3V to 2.7V VCC
6.0 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion and withdrawal (Note 1)
s Uses patented noise/EMI reduction circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model
! 2000V
Machine model
! 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter โ€œXโ€ to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
Package Number
Package Descriptions
74ALVC16240MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OEn
Output Enable Input (Active LOW)
I0โ€“I15
Inputs
O0โ€“O15
Outputs


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