© 2005 Fairchild Semiconductor Corporation

DS012416

www.fairchildsemi.com

March 1995

Revised February 2005

74LCX125

Low Voltage Quad Buffer

with 5V Tolerant Inputs and Outputs

General Description

The LCX125 contains four independent non-inverting buff-

ers with 3-STATE outputs. The inputs tolerate voltages up

to 7V allowing the interface of 5V systems to 3V systems.

The 74LCX125 is fabricated with an advanced CMOS tech-

nology to achieve high speed operation while maintaining

CMOS low power dissipation.

Features

s 5V tolerant inputs and outputs

s Power down high impedance inputs and outputs

s Supports live insertion/withdrawal (Note 1)

s

s Implements patented noise/EMI reduction circuitry

s Latch-up performance exceeds JEDEC 78 conditions

s ESD performance:

Human body model

! 2000V

Machine model

! 100V

s Leadless Pb-Free DQFN package

Note 1: To ensure the high-impedance state during power up or down, OE

resistor is determined by the current-sourcing capability of the driver.

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 2: DQFN package available in Tape and Reel only.

Note 3: “_NL” indicates Pb-Free package (per JEDED J-STD-020B). Device available in Tape and Reel only.

Order Number

Package

Package Description

Number

74LCX125M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LCX125MX_NL

(Note 3)

M14A

Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LCX125SJ

M14D

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LCX125BQX

(Note 2)

MLP014A

Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC

MO-241, 2.5 x 3.0mm

74LCX125MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LCX125MTCX_NL

(Note 3)

MTC14

Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide