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74LVTH162373 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 2 Page - Fairchild Semiconductor

๋ถ€ํ’ˆ๋ช… 74LVTH162373
์ƒ์„ธ๋‚ด์šฉ  Low Voltage 16-Bit Transparent Latch with 3-STATE Outputs and 25ohm Series Resistors in the Outputs
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์ œ์กฐ์‚ฌ  FAIRCHILD [Fairchild Semiconductor]
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Connection Diagram
Pin Descriptions
Truth Tables
H
HIGH Voltage Level
L
LOW Voltage Level
X
Immaterial
Z
HIGH Impedance
Oo
Previous output prior to HIGH-to-LOW transition of LE
Functional Description
The LVTH162373 contains sixteen D-type latches with 3-STATE standard outputs. The device is byte controlled with each
byte functioning identically, but independent of the other. Control pins can be shorted together to obtain full 16-bit operation.
The following description applies to each byte. When the Latch Enable (LEn) input is HIGH, data on the Dn enters the
latches. In this condition the latches are transparent, i.e, a latch output will change states each time its D input changes.
When LEn is LOW, the latches store information that was present on the D inputs a setup time preceding the HIGH-to-LOW
transition of LEn. The 3-STATE standard outputs are controlled by the Output Enable (OEn) input. When OEn is LOW, the
standard outputs are in the 2-state mode. When OEn is HIGH, the standard outputs are in the high impedance mode but
this does not interfere with entering new data into the latches.
Pin Names
Description
OEn
Output Enable Input (Active LOW)
LEn
Latch Enable Input
I0โ€“I15
Inputs
O0โ€“O15
3-STATE Outputs
Inputs
Outputs
LE1
OE1
I0โ€“I7
O0โ€“O7
X
H
X
Z
H
L
L
L
H
L
H
H
L
L
X
Oo
Inputs
Outputs
LE2
OE2
I8โ€“I15
O8โ€“O15
X
H
X
Z
H
L
L
L
H
L
H
H
L
L
X
Oo


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