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74VCX32 데이터시트(PDF) 4 Page - Fairchild Semiconductor

부품명 74VCX32
부품 상세설명  Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs
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제조업체  FAIRCHILD [Fairchild Semiconductor]
홈페이지  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74VCX32 데이터시트(HTML) 4 Page - Fairchild Semiconductor

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4
DC Electrical Characteristics (Continued)
AC Electrical Characteristics (Note 5)
Note 5: For CL 50 pF, add approximately 300 ps to the AC maximum specification.
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Symbol
Parameter
Conditions
VCC
Min
Max
Units
(V)
VOL
LOW Level Output Voltage
IOL 100 PA
2.7 - 3.6
0.2
V
IOL 12 mA
2.7
0.4
IOL 18 mA
3.0
0.4
IOL 24 mA
3.0
0.55
IOL 100 PA
2.3 - 2.7
0.2
IOL 12 mA
2.3
0.4
IOL 18 mA
2.3
0.6
IOL 100 PA
1.65 - 2.3
0.2
IOL 6 mA
1.65
0.3
IOL 100 PA
1.4 - 1.6
0.2
IOL 2 mA
1.4
0.35
IOL 100 PA1.2
0.05
II
Input Leakage Current
0
d VI d 3.6V
1.2 - 3.6
r5.0
PA
IOFF
Power Off Leakage Current
0
d (VI) d 3.6V
0
10
PA
ICC
Quiescent Supply Current
VI VCC or GND
1.2 - 3.6
20
PA
VCC d VI d 3.6V
1.2 - 3.6
r20
'ICC
Increase in ICC per Input
VIH VCC – 0.6V
2.7 - 3.6
750
PA
Symbol
Parameter
Conditions
VCC
TA 40qC to 85qC
Units
Figure
(V)
Min
Max
Number
tPHL
Propagation Delay
CL 30 pF, RL 500:
3.3
r 0.3
0.6
2.8
ns
Figures
1, 2
tPLH
2.5
r 0.2
0.8
3.7
1.8
r 0.15
1.0
7.4
CL 15 pF, RL 2k:
1.5
r 0.1
1.0
14.8
Figures
3, 4
1.2
1.5
37
tOSHL
Output to Output
CL 30 pF, RL 500:
3.3
r 0.3
0.5
ns
tOSLH
Skew (Note 6)
2.5
r 0.2
0.5
1.8
r 0.15
0.75
CL 15 pF, RL 2k:
1.5
r 0.1
1.5
1.2
1.5


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