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AD9225ARZ 데이터시트(PDF) 5 Page - Analog Devices

부품명 AD9225ARZ
상세설명  Complete 12-Bit, 25 MSPS Monolithic A/D Converter
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AD9225ARZ 데이터시트(HTML) 5 Page - Analog Devices

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AD9225
–5–
PIN FUNCTION DESCRIPTIONS
Pin Number
Mnemonic
Description
1
CLK
Clock Input Pin
2BIT 12
Least Significant Data Bit (LSB)
3–12
BIT 11–2
Data Output Bit
13
BIT 1
Most Significant Data Bit (MSB)
14
OTR
Out of Range
15, 26
AVDD
5 V Analog Supply
16, 25
AVSS
Analog Ground
17
SENSE
Reference Select
18
VREF
Input Span Select (Reference I/O)
19
REFCOM
Reference Common (AVSS)
20
CAPB
Noise Reduction Pin
21
CAPT
Noise Reduction Pin
22
CML
Common-Mode Level (Midsupply)
23
VINA
Analog Input Pin (+)
24
VINB
Analog Input Pin (–)
27
DRVSS
Digital Output Driver Ground
28
DRVDD
3 V to 5 V Digital Output Driver Supply
TERMINOLOGY
Integral Nonlinearity (INL)
INL refers to the deviation of each individual code from a line
drawn from negative full scale through positive full scale. The
point used as negative full scale occurs 1/2 LSB before the first
code transition. Positive full scale is defined as a level 1 1/2 LSB
beyond the last code transition. The deviation is measured from
the middle of each particular code to the true straight line.
Differential Nonlinearity (DNL, No Missing Codes)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Guaranteed
no missing codes to 12-bit resolution indicates that all 4096
codes, respectively, must be present over all operating ranges.
Zero Error
The major carry transition should occur for an analog value
1/2 LSB below VINA = VINB. Zero error is defined as the
deviation of the actual transition from that point.
Gain Error
The first code transition should occur at an analog value 1/2 LSB
above negative full scale. The last transition should occur at an
analog value 1 1/2 LSB below the nominal full scale. Gain error
is the deviation of the actual difference between first and last
code transitions and the ideal difference between first and last
code transitions.
Temperature Drift
The temperature drift for zero error and gain error specifies the
maximum change from the initial (25
∞C) value to the value at
TMIN or TMAX.
Power Supply Rejection
The specification shows the maximum change in full scale from
the value with the supply at the minimum limit to the value with
the supply at its maximum limit.
Aperture Jitter
Aperture jitter is the variation in aperture delay for successive
samples and is manifested as noise on the input to the ADC.
Aperture Delay
Aperture delay is a measure of the sample-and-hold amplifier
(SHA) performance and is measured from the rising edge of the
clock input to when the input signal is held for conversion.
Signal-to-Noise and Distortion Ratio (S/N+D, SINAD)
S/N+D is the ratio of the rms value of the measured input
signal to the rms sum of all other spectral components below
the Nyquist frequency, including harmonics but excluding dc.
The value for S/N+D is expressed in decibels.
Effective Number of Bits (ENOB)
For a sine wave, SINAD can be expressed in terms of the num-
ber of bits. Using the following formula,
N = (SINAD – 1.76)/6.02
it is possible to get a measure of performance expressed as N,
the effective number of bits.
The effective number of bits for a device for sine wave inputs at
a given input frequency can be calculated directly from its mea-
sured SINAD.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic com-
ponents to the rms value of the measured input signal and is
expressed as a percentage or in decibels.
Signal-to-Noise Ratio (SNR)
SNR is the ratio of the rms value of the measured input signal to
the rms sum of all other spectral components below the Nyquist
frequency, excluding the first six harmonics and dc. The value
for SNR is expressed in decibels.
Spurious-Free Dynamic Range (SFDR)
SFDR is the difference in dB between the rms amplitude of the
input signal and the peak spurious signal.
Rev. C


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