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STFI10N62K3 데이터시트(PDF) 5 Page - STMicroelectronics |
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STFI10N62K3 데이터시트(HTML) 5 Page - STMicroelectronics |
5 / 17 page STF10N62K3, STFI10N62K3, STI10N62K3, STP10N62K3 Electrical characteristics Doc ID 15640 Rev 4 5/17 The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) tr td(off) tf Turn-on delay time Rise time Turn-off-delay time Fall time VDD = 310 V, ID = 4 A, RG = 4.7 Ω, VGS = 10 V (see Figure 17) - 14.5 15 41 31 - ns ns ns ns Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD ISDM (1) 1. Pulse width limited by safe operating area Source-drain current Source-drain current (pulsed) - 8.4 33.6 A A VSD (2) 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% Forward on voltage ISD = 8 A, VGS = 0 - 1.5 V trr Qrr IRRM Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 8 A, di/dt = 100A/µs VDD = 60 V (see Figure 22) - 320 2 13 ns µC A trr Qrr IRRM Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 8 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (see Figure 22) - 410 2.9 14 ns µC A Table 8. Gate-source Zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)GSO Gate-source breakdown voltage (ID = 0) Igs= ± 1 mA 30 - V |
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