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AM4534C 데이터시트(PDF) 2 Page - Analog Power |
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AM4534C 데이터시트(HTML) 2 Page - Analog Power |
2 / 3 page 2 AM4534C Analog Power September, 2003 - Rev. A PRELIMINARY Publication Order Number: DS-AM4534_E Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. Ch Min Typ Max VGS = 0 V, ID = 250 uA N30 VGS = 0 V, ID = -250 uA P-26 VGS = VDS, ID = 250 uA N1 VGS = VDS, ID = -250 uA P-1 VGS = -12 V, VDS = 0 V P±100 V GS = 20 V, V DS = 0 V N±100 VDS = -21.2 V, VGS = 0 V P-1 V DS = 24 V, V GS = 0 V N1 VDS = 5 V, VGS = 10 V N20 VDS = -5 V, VGS = -4.5 V P-20 VGS = 10 V, ID = 7 A 28 VGS = 4.5 V, ID = 6 A 40 VGS = -4.5 V, ID = -5 A 52 VGS = -2.5 V, ID = -4 A 80 VDS = 15 V, ID = 7 A N 25 VDS = -15 V, ID = -5 A P10 N4 P25 N1.1 P2.4 N1.4 P3.9 N 8 P 7 N 5 P 13 N23 P14 N3 P9 Forward Tranconductance A gfs S Total Gate Charge Qg N-Channel VDS=15V, VGS=10V, ID=7A P-Channel VDS=-15V, VGS=-4.5V, ID=-5A nC Limits Unit SPECIFICATIONS (TA = 25 oC UNLESS OTHERWISE NOTED) nA Static Test Conditions V V Symbol Parameter Gate-Threshold Voltage VGS(th) Drain-Source Breakdown Voltage V(BR)DSS A Gate-Body Leakage IGSS uA IDSS Zero Gate Voltage Drain Current N P On-State Drain Current A ID(on) tr td(off) mΩ Drain-Source On-Resistance A rDS(on) Switching Dynamic Turn-On Delay Time Rise Time nS N-Chaneel V DD=15V, VGS=10V, ID=1A , R GEN=6Ω, P-Channel VDD=-15V, VGS=-4.5V, ID=-1A RGEN=6Ω Fall-Time tf Turn-Off Delay Time td(on) Gate-Source Charge Qgs Gate-Drain Charge Qgd |
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