ISLA216P13 datasheet(3/25 Pages) INTERSIL

부품명	ISLA216P13

상세설명	Ultra High Performance Broadband 12 to 16-Bit Data Acquisition Platform

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제조업체	INTERSIL [Intersil Corporation]

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Application Note 1837

3

AN1837.0

May 3, 2013

Software Start-Up

The FPGA clock is derived from the ADC output clock, and the

FPGA clock must be active for the software to operate correctly.

Therefore, it is critical to have a convert clock present and the

board powered up before the Konverter software is launched. It is

not necessary to have an analog input signal present.

The compressed MATLAB files are unpacked the first time the

GUI is invoked after installation. This will slow the start-up the

first time the evaluation system is used but it will run more

quickly in subsequent startups. Complete information can be

found in the KMB-001 Installer manual at:

http://www.intersil.com/converters/adc_eval_platform/

The main Konverter Analyzer window is shown in Figure 16. The

application opens in FFT mode by default, but other modes can

be selected using the radio buttons in the lower left corner. In

each mode, relevant parameters are displayed in the data box

the left side of the window.

The following data is displayed in all operating modes –

1. Fsamp: Sample clock frequency, automatically detected.

2. Ffund: Input frequency, automatically detected if input is a

single tone or dominant tone waveform

3. Fund: Amplitude of the dominant tone in dBFS

4. Samples: Record length, defaults but can be updated

Data Acquisition

Normally, the first step to an FFT data display is to open the

“Setup” key in the upper left and pick a windowing function to

limit spectral leakage. All the plots and data here used the

Blackman Harris 4 term windowing. It is also possible to change

the record length for the FFT in this screen. Normally, the

continuous calibration and background keys are selected and, if

desired, an averaging of the FFT outputs may be selected in the

lower left of the Konverter screen set up for FFT display (default

at start-up). Then, press “Run” in the lower left and the FFT will be

updating. The number of averaged sweeps defaults to 10, but

can also be changed in the “Setup” conditions dialog window.

Menu items and the toolbar buttons may not function properly if

data is being captured continuously. Press “Stop” in the lower left

before selecting a menu item or using a toolbar button.

AN1433 should be consulted for more information on the

options provided in the Konverter windows. AN1434 offers help

for first time installation if needed.

Hardware and Analog Signal Path

Description

Figure 2 shows a close-up of the ISLA214P50-55210EV1Z

daughtercard.

The SMA at the top left is the analog input connection, the next

one down is an optional sense port for an attenuated version of

the differential signal being presented to the ADC input pins,

while the lower SMA is the clock input pin. Several optional

inputs are not populated, like the amplifier disable control line at

the lower left of the card and some alternate clock input paths on

the bottom. The VTEST path SMA is not populated on the board as

delivered but may be easily added.

FIGURE 2. ISLA214P50-55210EV1Z DAUGHTERBOARD

유사한 부품 번호 - ISLA216P13

제조업체	부품명	데이터시트	상세설명
Intersil Corporation	ISLA216P13	1Mb / 32P	16-Bit, 250MSPS/200MSPS/130MSPS ADC
Renesas Technology Corp	ISLA216P13	1Mb / 35P	16-Bit, 250MSPS/200MSPS/130MSPS ADC
Intersil Corporation	ISLA216P13	1Mb / 37P	14-Bit, 500MSPS ADC Programmable Built-in Test Patterns
	ISLA216P13	1Mb / 38P	12-Bit, 500MSPS ADC Programmable Built-in Test Patterns
	ISLA216P13	963Kb / 34P	High Performance 14-Bit, 125MSPS ADC

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ISLA216P13 데이터시트(PDF) 3 Page - Intersil Corporation

ISLA216P13 데이터시트(HTML) 3 Page - Intersil Corporation

유사한 부품 번호 - ISLA216P13

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