AD7490BCPZ datasheet(10/28 Pages) AD

부품명	AD7490BCPZ

상세설명	16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP

Download	28 Pages

Scroll/Zoom	100%

제조업체	AD [Analog Devices]

홈페이지	http://www.analog.com

Logo

10 / 28 page

AD7490

Data Sheet

Rev. D | Page 10 of 28

TERMINOLOGY

Integral Nonlinearity

This is the maximum deviation from a straight line passing

through the endpoints of the ADC transfer function. The end-

points of the transfer function are zero scale, a point 1 LSB

below the first code transition, and full scale, a point 1 LSB

above the last code transition.

Differential Nonlinearity

This is the difference between the measured and the ideal 1 LSB

change between any two adjacent codes in the ADC.

Offset Error

This is the deviation of the first code transition (00 … 000) to

(00 … 001) from the ideal, that is, AGND + 1 LSB.

Offset Error Match

This is the difference in offset error between any two channels.

Gain Error

This is the deviation of the last code transition (111 … 110) to

(111 … 111) from the ideal (that is, REFIN − 1 LSB) after the

offset error has been adjusted out.

Gain Error Match

This is the difference in gain error between any two channels.

Zero Code Error

This applies when using the twos complement output coding

option, in particular to the 2 × REFIN input range with −REFIN

to +REFIN biased about the REFIN point. It is the deviation of the

midscale transition (all 0s to all 1s) from the ideal VIN voltage,

that is, REFIN − 1 LSB.

Zero Code Error Match

This is the difference in zero code error between any two

channels.

Positive Gain Error

This applies when using the twos complement output coding

option, in particular the 2 × REFIN input range with −REFIN to

+REFIN biased about the REFIN point. It is the deviation of the

last code transition (011 … 110) to (011 … 111) from the ideal

(that is, +REFIN − 1 LSB) after the zero code error has been

adjusted out.

Positive Gain Error Match

This is the difference in positive gain error between any two

channels.

Negative Gain Error

This applies when using the twos complement output coding

option, in particular to the 2 × REFIN input range with −REFIN

to +REFIN biased about the REFIN point. It is the deviation of the

first code transition (100 … 000) to (100 … 001) from the ideal

(that is, −REFIN + 1 LSB) after the zero code error has been

adjusted out.

Negative Gain Error Match

This is the difference in negative gain error between any two

channels.

Channel-to-Channel Isolation

Channel-to-channel isolation is a measure of the level of

crosstalk between channels. It is measured by applying a full-

scale 400 kHz sine wave signal to all 15 nonselected input

channels and determining how much that signal is attenuated in

the selected channel with a 50 kHz signal. This specification is

the worst case across all 16 channels for the AD7490.

PSR (Power Supply Rejection)

Variations in power supply affect the full scale transition, but

not the converter linearity. Power supply rejection is the

maximum change in the full-scale transition point due to a

change in power supply voltage from the nominal value. (see

the Typical Performance Characteristics section).

Track-and-Hold Acquisition Time

The track-and-hold amplifier returns into track on the 14th

SCLK falling edge. Track-and-hold acquisition time is the

minimum time required for the track-and-hold amplifier to

remain in track mode for its output to reach and settle to within

±1 LSB of the applied input signal, given a step change to the

input signal.

Signal-to-(Noise + Distortion) Ratio

This is the measured ratio of signal to (noise + distortion) at the

output of the analog-to-digital converter. The signal is the rms

amplitude of the fundamental. Noise is the sum of all nonfunda-

mental signals up to half the sampling frequency (fS/2), excluding

dc. The ratio is dependent on the number of quantization levels

in the digitization process; the more levels, the smaller the quan-

tization noise. The theoretical signal-to-(noise + distortion) ratio

for an ideal N-bit converter with a sine wave input is given by

Signal-to-(Noise + Distortion) (dB) = 6.02N + 1.76

Thus for a 12-bit converter, this is 74 dB.

Total Harmonic Distortion

Total harmonic distortion (THD) is the ratio of the rms sum of

harmonics to the fundamental. For the AD7490, it is defined as

( )

1

6

5

4

3

2

V

THD

2

log

20

dB

+

×

=

where V1 is the rms amplitude of the fundamental and V2, V3,

V4, V5, and V6 are the rms amplitudes of the second through the

sixth harmonics.

유사한 부품 번호 - AD7490BCPZ

제조업체	부품명	데이터시트	상세설명
Analog Devices	AD7490BCPZ	748Kb / 29P	16-Channel, 1 MSPS, 12-Bit ADC
Analog Devices	AD7490BCPZ-REEL7	748Kb / 29P	16-Channel, 1 MSPS, 12-Bit ADC

More results

유사한 설명 - AD7490BCPZ

제조업체	부품명	데이터시트	상세설명
Analog Devices	AD7490	950Kb / 29P	16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP REV. D
Analog Devices	AD7490	2Mb / 24P	16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP REV. A
ams AG	AS1542	78Kb / 2P	16-Channel, 1 Msps, 12-Bit ADC with Sequencer
Analog Devices	AD7914	525Kb / 32P	4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP REV. C
	AD7924	525Kb / 32P	4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP REV. C
	AD7924BRUZ	525Kb / 32P	4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP REV. C
	AD7904	525Kb / 32P	4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP REV. C
	AD7904	411Kb / 24P	4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP REV. 0
	AD7923	381Kb / 24P	4-Channel, 200 kSPS 12-Bit ADC with Sequencer in 16-Lead TSSOP REV. D
	AD7923	380Kb / 24P	4-Channel, 200 kSPS 12-Bit ADC with Sequencer in 16-Lead TSSOP REV. C

More results

AD7490BCPZ 데이터시트(PDF) 10 Page - Analog Devices

AD7490BCPZ 데이터시트(HTML) 10 Page - Analog Devices

유사한 부품 번호 - AD7490BCPZ

유사한 설명 - AD7490BCPZ

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

데이터시트 다운로드

링크 URL