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AD7417BRZ-REEL7 데이터시트(PDF) 9 Page - Analog Devices |
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AD7417BRZ-REEL7 데이터시트(HTML) 9 Page - Analog Devices |
9 / 24 page AD7416/AD7417/AD7418 Rev. I | Page 9 of 24 SDA 1 SCL 2 OTI 3 GND 4 VDD 8 A0 7 A1 6 A2 5 AD7416 TOP VIEW (Not to Scale) SDA 1 SCL 2 OTI 3 GND 4 CONVST 8 VDD 7 REFIN 6 AIN 5 AD7418 TOP VIEW (Not to Scale) Figure 7. AD7416 Pin Configuration (SOIC/MSOP) Figure 8. AD7418 Pin Configuration (SOIC/MSOP) Table 5. AD7416 Pin Function Descriptions Pin No. Mnemonic Description 1 SDA Digital I/O. Serial bus bidirectional data. Push-pull output. 2 SCL Digital Input. Serial bus clock. 3 OTI This pin is a logic output. The OTI is set if the result of a conversion on Channel 0 (temperature sensor) is greater than an 8-bit word in the TOTI setpoint register. The signal is reset at the end of a serial read operation. Open-drain output. 4 GND Ground reference for track-and-hold, comparator and capacitor DAC, and digital circuitry. 5 A2 Digital Input. This is the highest programmable bit of the serial bus address. 6 A1 Digital Input. This is the middle programmable bit of the serial bus address. 7 A0 Digital Input. This is the lowest programmable bit of the serial bus address. 8 VDD Positive Supply Voltage, 2.7 V to 5.5 V. Table 6. AD7418 Pin Function Descriptions Pin No. Mnemonic Description 1 SDA Digital I/O. Serial bus bidirectional data. Push-pull output. 2 SCL Digital Input. Serial bus clock. 3 OTI This is a logic output. The OTI is set if the result of a conversion on Channel 0 (temperature sensor) is greater than an 8-bit word in the TOTI setpoint register. The signal is reset at the end of a serial read operation. Open-drain output. 4 GND Ground reference for track-and-hold, comparator and capacitor DAC, and digital circuitry. 5 AIN Analog Input Channel. The input channel is single-ended with respect to GND. The input channel can convert voltage signals in the range of 0 V to VREF. The analog input channel is selected by writing to the configuration register of the AD7418 and choosing Channel 4. 6 REFIN Reference Input. An external 2.5 V reference can be connected to the AD7418 at this pin. To enable the on-chip reference, the REFIN pin should be tied to GND. If an external reference is connected to the AD7418, the internal reference shuts down. 7 VDD Positive Supply Voltage, 2.7 V to 5.5 V. 8 CONVST Logic Input Signal. Convert start signal. The rising edge of this signal fully powers up the part. The power-up time for the part is 4 μs. If the CONVST pulse is greater than 4 μs, the falling edge of CONVST places the track-and-hold mode into hold mode and initiates a conversion. If the pulse is less than 4 μs, an internal timer ensures that the track-and-hold does not go into hold, and conversion is not initiated until the power-up time has elapsed. The track-and-hold goes into track mode again at the end of conversion (see the section). Operating Modes |
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