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LAN8710A-EZC 데이터시트(PDF) 37 Page - SMSC Corporation

부품명 LAN8710A-EZC
상세설명  Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology
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제조업체  SMSC [SMSC Corporation]
홈페이지  http://www.smsc.com
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LAN8710A-EZC 데이터시트(HTML) 37 Page - SMSC Corporation

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Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology
Datasheet
SMSC LAN8710A/LAN8710Ai
37
Revision 1.4 (08-23-12)
DATASHEET
The MODE[2:0] hardware configuration pins are multiplexed with other signals as shown in Table 3.7.
3.7.3
RMIISEL: MII/RMII Mode Configuration
MII or RMII mode selection is latched on the rising edge of the internal reset (nRST) based on the
strapping of the RMIISEL configuration strap. The default mode is MII (via the internal pull-down
resistor). To select RMII mode, pull the RMIISEL configuration strap high with an external resistor to
VDDIO.
When the nRST pin is deasserted, the MIIMODE bit of the Special Modes Register is loaded according
to the RMIISEL configuration strap. The mode is reflected in the MIIMODE bit of the Special Modes
Register.
Refer to Section 3.4, "MAC Interface," on page 30 for additional information on MII and RMII modes.
Table 3.6 MODE[2:0] Bus
MODE[2:0]
MODE DEFINITIONS
DEFAULT REGISTER BIT VALUES
REGISTER 0
REGISTER 4
[13,12,10,8]
[8,7,6,5]
000
10Base-T Half Duplex. Auto-negotiation disabled.
0000
N/A
001
10Base-T Full Duplex. Auto-negotiation disabled.
0001
N/A
010
100Base-TX Half Duplex. Auto-negotiation
disabled.
CRS is active during Transmit & Receive.
1000
N/A
011
100Base-TX Full Duplex. Auto-negotiation disabled.
CRS is active during Receive.
1001
N/A
100
100Base-TX Half Duplex is advertised. Auto-
negotiation enabled.
CRS is active during Transmit & Receive.
1100
0100
101
Repeater mode. Auto-negotiation enabled.
100Base-TX Half Duplex is advertised.
CRS is active during Receive.
1100
0100
110
Power Down mode. In this mode the transceiver will
wake-up in Power-Down mode. The transceiver
cannot be used when the MODE[2:0] bits are set to
this mode. To exit this mode, the MODE bits in
Register 18.7:5(see Section 4.2.9, "Special Modes
Register," on page 60) must be configured to some
other value and a soft reset must be issued.
N/A
N/A
111
All capable. Auto-negotiation enabled.
X10X
1111
Table 3.7 Pin Names for Mode Bits
MODE BIT
PIN NAME
MODE[0]
RXD0/MODE0
MODE[1]
RXD1/MODE1
MODE[2]
COL/CRS_DV/MODE2


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