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LAN8710A-EZC 데이터시트(PDF) 60 Page - SMSC Corporation |
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LAN8710A-EZC 데이터시트(HTML) 60 Page - SMSC Corporation |
60 / 82 page Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology Datasheet Revision 1.4 (08-23-12) 60 SMSC LAN8710A/LAN8710Ai DATASHEET 4.2.9 Special Modes Register Note 4.4 The default value of this field is determined by the RMIISEL configuration strap. Refer to Section 3.7.3, "RMIISEL: MII/RMII Mode Configuration," on page 37 for additional information. Note 4.5 The default value of this field is determined by the MODE[2:0] configuration straps. Refer to Section 3.7.2, "MODE[2:0]: Mode Configuration," on page 36 for additional information. Note 4.6 The default value of this field is determined by the PHYAD[2:0] configuration straps. Refer to Section 3.7.1, "PHYAD[2:0]: PHY Address Configuration," on page 36 for additional information. Index (In Decimal): 18 Size: 16 bits BITS DESCRIPTION TYPE DEFAULT 15 RESERVED RO - 14 MIIMODE Reflects the mode of the digital interface: 0 = MII Mode 1 = RMII Mode Note: When writing to this register, the default value of this bit must always be written back. R/W NASR Note 4.4 13:8 RESERVED RO - 7:5 MODE Transceiver mode of operation. Refer to Section 3.7.2, "MODE[2:0]: Mode Configuration," on page 36 for additional details. R/W NASR Note 4.5 4:0 PHYAD PHY Address. The PHY Address is used for the SMI address and for initialization of the Cipher (Scrambler) key. Refer to Section 3.7.1, "PHYAD[2:0]: PHY Address Configuration," on page 36 for additional details. R/W NASR Note 4.6 |
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