전자부품 데이터시트 검색엔진 |
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FIN1017 데이터시트(PDF) 1 Page - Fairchild Semiconductor |
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FIN1017 데이터시트(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 2002 Fairchild Semiconductor Corporation DS500500 www.fairchildsemi.com April 2001 Revised April 2002 FIN1017 3.3V LVDS 1-Bit High Speed Differential Driver General Description This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technol- ogy. The driver translates LVTTL signal levels to LVDS lev- els with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed trans- fer of clock or data. The FIN1017 can be paired with its companion receiver, the FIN1018, or with any other LVDS receiver. Features s Greater than 600Mbs data rate s 3.3V power supply operation s 0.5ns maximum differential pulse skew s 1.5ns maximum propagation delay s Low power dissipation s Power-Off protection s Meets or exceeds the TIA/EIA-644 LVDS standard s Flow-through pinout simplifies PCB layout s 8-Lead SOIC and US8 packages save space Ordering Code: Connection Diagrams 8-Lead SOIC Pin Assignment for US-8 Package Note: Ground pins 4 and 5 for optimum operation. TOP VIEW Pin Descriptions Function Table H = HIGH Logic Level L = LOW Logic Level X = Don’t Care Order Number Package Number Package Description FIN1017M M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow [TUBE] FIN1017MX M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow [TAPE and REEL] FIN1017K8X MAB08A 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide [TAPE and REEL] Pin Name Description DIN LVTTL Data Input DOUT+ Non-inverting Driver Output DOUT− Inverting Driver Output VCC Power Supply GND Ground NC No Connect Input Outputs DIN DOUT+ DOUT− LL H HH L OPEN L H |
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