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전자부품 데이터시트 검색엔진 |
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TLV2211IDBVRG4 데이터시트(PDF) 3 Page - Texas Instruments |
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TLV2211IDBVRG4 데이터시트(HTML) 3 Page - Texas Instruments |
3 / 31 page ![]() SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TLV2211, TLV2211Y Advanced LinCMOS RAILTORAIL MICROPOWER SINGLE OPERATIONAL AMPLIFIERS 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2211Y chip information This chip, when properly assembled, displays characteristics similar to the TLV2211C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 10 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (2) IS INTERNALLY CONNECTED TO BACK SIDE OF CHIP. + − OUT IN + IN − VDD + (5) (1) (3) (4) (2) VDD −/ GND 40 (3) (2) (1) (5) (4) 32 |
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