7

Notes:

1. Not to exceed 5% duty factor, not to exceed 50

sec pulse width.

2. All devices are considered two-terminal devices: measured between

all input leads or terminals shorted together and all output leads or

terminals shorted together.

3. This is a momentary withstand test, not an operating condition.

edge of the input current pulse to the 1.5 V point on the falling edge

50% point on the falling edge of the input current pulse to the 1.5 V

point on the rising edge of the output pulse. Pulse Width Distortion,

that can be sustained with the output voltage in the logic high state

6. Duration of output short circuit time not to exceed 10 ms.

7. Power Supply Noise Immunity is the peak to peak amplitude of the

still remain in the desired logic state. For desired logic high state,

8. Measured between adjacent input pairs shorted together for each

multichannel device.

9. Each channel.

10. Standard parts receive 100% testing at 25° C (Subgroups 1 and 9).

SMD, Class H and Class K parts receive 100% testing at 25° C, 125° C,

and -55° C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).

11. Parameters are tested as part of device initial characterization and

after design and process changes. Parameters are guaranteed to

limits specified for all lots not specifically tested.

12. Propagation delay skew is defined as the difference between the

minimum and maximum propagation delays for any given group of

optocouplers with the same part number that are all switching at the

same time under the same operating conditions.

13. The HCPL-6430, HCPL-6431, and HCPL-643K dual channel parts

function as two independent single channel units. Use the single

channel parameter limits.

Typical Characteristics

Parameter

Symbol

Typ.

Units

Test Conditions

Fig.

Notes

Input Current Hysteresis

0.25

mA

3

Input Diode Temperature Coefficient

-1.11

mV/°C

4

Resistance (Input-Output)



2

Capacitance (Input-Output)

0.6

pF

2

Logic Low Short Circuit Output Current

65

mA

6, 9

Logic High Short Circuit Output Current

-50

mA

6, 9

Output Rise Time (10-90%)

15

ns

5

Output Fall Time (90-10%)

10

ns

5

Propagation Delay Skew

30

ns

10

12

Power Supply Noise Immunity

PSNI

0.5

7

Single Channel Product Only

Parameter

Symbol

Typ.

Units

Test Conditions

Fig.

Notes

Input Capacitance

15

pF

Pins 2 and 3

Output Enable Time to Logic High

15

ns

8, 9

Output Enable Time to Logic Low

30

ns

8, 9

Output Disable Time from Logic High

20

ns

8, 9

Output Disable Time from Logic Low

15

ns

8, 9

Dual and Quad Channel Product Only

Input Capacitance

15

pF

Input-Input Leakage Current

0.5

nA

8

Input-Input Resistance



8

Input-Input Capacitance

1.3

pF

8