전자부품 데이터시트 검색엔진 |
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IS61LF409618B-7.5M3LI 데이터시트(PDF) 5 Page - Integrated Silicon Solution, Inc |
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IS61LF409618B-7.5M3LI 데이터시트(HTML) 5 Page - Integrated Silicon Solution, Inc |
5 / 34 page Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 5 Rev. 00B 10/15/2012 IS61LF204836B, IS61VF/VVF204836B IS61LF409618B, IS61VF/VVF409618B 119 BGA PACKAGE PIN CONFIGURATION 4Mx18 (TOP VIEW) PIN DESCRIPTIONS Note: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired. 1 2 3 4 5 6 7 A VDDQ A A ADSP A A VDDQ B NC A A ADSC A A NC C NC A A VDD A A NC D DQb NC Vss NC Vss DQPa NC E NC DQb Vss CE Vss NC DQa F VDDQ NC Vss OE Vss DQa VDDQ G NC DQb BWb ADV Vss NC DQa H DQb NC Vss GW Vss DQa NC J VDDQ VDD NC VDD NC VDD VDDQ K NC DQb Vss CLK Vss NC DQa L DQb NC Vss NC BWa DQa NC M VDDQ DQb Vss BWE Vss NC VDDQ N DQb NC Vss A1* Vss DQa NC P NC DQPb Vss A0* Vss NC DQa R NC A MODE VDD NC A NC T A A A NC A A ZZ U VDDQ TMS TDI TCK TDO NC VDDQ Symbol Pin Name A Synchronous Address Inputs A0, A1 Synchronous Burst Address Inputs ADV Synchronous Burst Address Advance ADSP Synchronous Address Status Processor ADSC Synchronous Address Status Controller GW Synchronous Global Write Enable CLK Synchronous Clock CE Synchronous Chip Select BWa -BWb Synchronous Byte Write Controls BWE Synchronous Byte Write Enable Symbol Pin Name OE Asynchronous Output Enable ZZ Asynchronous Power Sleep Mode MODE Synchronous Burst Sequence Selection TCK, TDO JTAG Pins TMS, TDI NC No Connect DQa-DQb Synchronous Data Inputs/Outputs DQPa-DQPb Synchronous Parity Data Inputs/Outputs Vdd Power Supply Vddq I/O Power Supply Vss Ground |
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