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SI4812BDY 데이터시트(PDF) 11 Page - Vishay Siliconix

부품명 SI4812BDY
상세설명  microBUCK SiC403 6 A, 28 V Integrated Buck Regulator with Programmable LDO
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제조업체  VISHAY [Vishay Siliconix]
홈페이지  http://www.vishay.com
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Vishay Siliconix
SiC403
Document Number: 66550
S12-0628-Rev. C, 19-Mar-12
www.vishay.com
11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical support, please contact: analogswitchtechsupport@vi-
This method automatically produces an on-time that is
proportional to VOUT and inversely proportional to VIN.
Under steady-state conditions, the switching frequency can
be determined from the on-time by the following equation.
The SiC403 uses an external resistor to set the ontime
which indirectly sets the frequency. The on-time can be pro-
grammed to provide operating frequency from 200 kHz to 1
MHz using a resistor between the tON pin and ground. The
resistor value is selected by the following equation.
The maximum RtON value allowed is shown by the following
equation.
VOUT Voltage Selection
The switcher output voltage is regulated by comparing VOUT
as seen through a resistor divider at the FB pin to the internal
750 mV reference voltage, see figure 3.
As the control method regulates the valley of the output ripple
voltage, the DC output voltage VOUT is off set by the output
ripple according to the following equation.
When a large capacitor is placed in parallel with R1 (CTOP)
VOUT is shown by the following equation.
Enable and Power-Save Inputs
The EN/PSV and ENL inputs are used to enable or dis-
able the switching regulator and the LDO.
When EN/PSV is low (grounded), the switching regulator is
off and in its lowest power state. When off, the output of the
switching regulator soft-discharges the output into a 15
internal resistor via the VOUT pin.
When EN/PSV is allowed to float, the pin voltage will float to
1.5 V. The switching regulator turns on with power-save
disabled and all switching is in forced continuous mode.
When EN/PSV is high (above 2 V), the switching regulator
turns on with ultra-sonic power-save enabled. The SiC403
ultra-sonic power-save operation maintains a minimum
switching frequency of 25 kHz, for applications with stringent
audio requirements.
The ENL input is used to control the internal LDO. This input
serves a second function by acting as a VIN UVLO sensor for
the switching regulator.
The LDO is off when ENL is low (grounded). When ENL is a
logic high but below the VIN UVLO threshold (2.6 V typical),
then the LDO is on and the switcher is off. When ENL is
above the VIN UVLO threshold, the LDO is enabled and the
switcher is also enabled if the EN/PSV pin is not grounded.
Forced Continuous Mode Operation
The SiC403 operates the switcher in Forced Continuous
Mode (FCM) by floating the EN/PSV pin (see figure 4). In this
mode one of the power MOSFETs is always on, with no
intentional dead time other than to avoid cross-conduction.
This feature results in uniform frequency across the full load
range with the trade-off being poor efficiency at light loads
due to the high-frequency switching of the MOSFETs.
Figure 2 - On-Time Generation
Figure 3 - Output Voltage Selection
FB
750 mV
-
+
VOUT
VIN
Rton
On-time = K x Rton x (VOUT/VIN)
FB comparator
One-shot
timer
Gate
drives
DH
DL
Q1
Q2
L
Q1
ESR
FB
VOUT
COUT
VLX
+
fsw =
tON x VIN
VOUT
Rton =
(tON - 10 ns) x VIN
25 pF x VOUT
Rton_MAX =
VIN_MIN
15 µA
V
OUT
R
1
R
2
to FB pin
V
OUT = 0.75 x 1 +
+
R
1
R
2
2
V
RIPPLE
Figure 4 - Forced Continuous Mode Operation
V
OUT = 0.75 x
1 +
+
x
R
1
R
2
2
V
RIPPLE
1 + (R
1ωCTOP)
2
1 +
ωC
TOP
R
2 x R1
R
2 + R1
2
FB ripple
voltage (VFB)
Inductor
current
DC load current
FB threshold
(750 mV)
DH
DL
On-time
(tON)
DH on-time is triggered when
VFB reaches the FB threshold
DL drives high when on-time is completed.
DL remains high until VFB falls to the FB threshold.


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