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4TPB470M 데이터시트(PDF) 10 Page - Texas Instruments |
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4TPB470M 데이터시트(HTML) 10 Page - Texas Instruments |
10 / 40 page t t PG2 Output VIN2 t VIT+ (seeNoteA) VOUT2 V (seeNoteA) Threshold Voltage IT- NOTEA: V tripvoltageistypically5%lowerthantheoutputvoltage(95%V ).V toV isthehysteresisvoltage. IT IT - - O IT+ TPS70445, TPS70448 TPS70451, TPS70458 TPS70402 SLVS307F – SEPTEMBER 2000 – REVISED APRIL 2010 www.ti.com PG2 Timing Diagram (assuming VIN1 already powered up) TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. EN1 6 I Active low enable for VOUT1 EN2 7 I Active low enable for VOUT2 GND 9 — Ground GND/HEATSI 1, 12, 13, 24 — Ground/heatsink NK MR 5 I Manual reset input, active low, pulled up internally NC 4, 17, 20 — No connection PG1 19 O Open drain output, low when VOUT1 voltage is less than 95% of the nominal regulated voltage PG2 18 O Open drain output, low when VOUT2 voltage is less than 95% of the nominal regulated voltage RESET 8 O Open drain output, SVS (power-on reset) signal, active low VIN1 2, 3 I Input voltage of regulator 1 VIN2 10, 11 I Input voltage of regulator 2 VOUT1 22, 23 O Output voltage of regulator 1 VOUT2 14, 15 O Output voltage of regulator 2 VSENSE1/FB1 21 I Regulator 1 output voltage sense/regulator 1 feedback for adjustable VSENSE2/FB2 16 I Regulator 2 output voltage sense/regulator 2 feedback for adjustable 10 Submit Documentation Feedback Copyright © 2000–2010, Texas Instruments Incorporated |
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