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DM74AS652WM 데이터시트(PDF) 1 Page - Fairchild Semiconductor |
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DM74AS652WM 데이터시트(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 2003 Fairchild Semiconductor Corporation DS006325 www.fairchildsemi.com October 1986 Revised July 2003 DM74AS651 • DM74AS652 Octal Bus Transceiver and Register General Description These devices incorporate an octal transceiver and an octal D-type register configured to enable transmission of data from bus to bus or internal register to bus. The DM74AS651 offers 64-Industrial grade product guarantee- ing performance from −40°C to +85°C. These bus transceivers feature totem-pole 3-STATE out- puts designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these devices with the capability of being connected directly to and driv- ing the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidi- rectional bus drivers, and working registers. The registers in the DM74AS651 and DM74AS652 are edge-triggered D-type flip-flops. On the positive transition of the clock (CAB or CBA), the input data is stored. The SAB and SBA control pins are provided to select whether real-time data or stored data is transferred. A LOW input level selects real-time data and a HIGH level selects stored data. The select controls have a “make before break” configuration to eliminate a glitch which would nor- mally occur in a typical multiplexer during the transition between stored and real-time data. The Enable (GAB and GBA) control pins provide four modes of operation; real-time data transfer from bus A-to- B, real-time data transfer from bus B-to-A, real-time bus A and/or B data transfer to internal storage, or internal stored data transfer to bus A and/or B. Features s Switching specifications at 50 pF s Switching specifications guaranteed over full tempera- ture and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s 3-STATE buffer-type outputs drive bus lines directly s Guaranteed performance over industrial temperature range ( −40°C to +85°C) in 64-grade products Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Order Number Package Number Package Description DM74AS651WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide DM74AS651NT N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide DM74AS652WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide DM74AS652NT N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide |
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