74HC_HCT273_Q100

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Product data sheet

Rev. 1 — 19 June 2013

10 of 19

NXP Semiconductors

74HC273-Q100; 74HCT273-Q100

Octal D-type flip-flop with reset; positive-edge trigger

11. Waveforms

Measurement points are given in Table 8.

Fig 7.

Propagation delay clock input (CP) to output (Qn), clock (CP) pulse width, output transition time and the

maximum clock pulse frequency

001aae062

CP input

Qn output

10%

90%

GND

Measurement points are given in Table 8.

Fig 8.

Propagation delay master reset (MR) to output (Qn), pulse width master reset (MR) and recovery time

master reset (MR) to clock (CP)

mna464

MR input

CP input

Qn output

GND

GND