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ADM3071EARZ 데이터시트(PDF) 6 Page - Analog Devices

부품명 ADM3071EARZ
상세설명  3.3 V, 15,-15 kV ESD-Protected
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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ADM3071EARZ 데이터시트(HTML) 6 Page - Analog Devices

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ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 6 of 20
TIMING SPECIFICATIONS—ADM3073E/ADM3074E/ADM3075E
VCC = 3.3 V ± 10%, TA = TMIN to TMAX, unless otherwise noted.
Table 4.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
DRIVER
Maximum Data Rate
500
kbps
Propagation Delay, Low-to-High Level
tDPLH
180
800
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Propagation Delay, High-to-Low Level
tDPHL
180
800
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Rise Time/Fall Time
tDR/tDF
200
800
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
|tDPLH − tDPHL| Differential Driver Output Skew
tDSKEW
100
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Enable to Output High
tDZH
2500
ns
See Figure 10
Enable to Output Low
tDZL
2500
ns
See Figure 11
Disable Time from Low
tDLZ
100
ns
See Figure 11
Disable Time from High
tDHZ
100
ns
See Figure 10
Enable Time from Shutdown to High
tDZH(SHDN)
4500
ns
See Figure 10
Enable Time from Shutdown to Low
tDZL(SHDN)
4500
ns
See Figure 11
RECEIVER
Maximum Data Rate
500
kbps
Propagation Delay, Low-to-High Level
tRPLH
200
ns
CL = 15 pF (see Figure 12 and Figure 13)
Propagation Delay, High-to-Low Level
tRPHL
200
ns
CL = 15 pF (see Figure 12 and Figure 13)
|tRPLH − tRPHL| Output Skew
tRSKEW
30
ns
CL = 15 pF (see Figure 12 and Figure 13)
Enable to Output High
tRZH
50
ns
See Figure 14
Enable to Output Low
tRZL
50
ns
See Figure 14
Disable Time from Low
tRLZ
50
ns
See Figure 14
Disable Time from High
tRHZ
50
ns
See Figure 14
Enable Time from Shutdown to High
tRZH(SHDN)
4000
ns
See Figure 14
Enable Time from Shutdown to Low
tRZL(SHDN)
4000
ns
See Figure 14
TIME TO SHUTDOWN
tSHDN
50
200
600
ns


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