전자부품 데이터시트 검색엔진 |
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AD5570 데이터시트(PDF) 8 Page - Analog Devices |
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AD5570 데이터시트(HTML) 8 Page - Analog Devices |
8 / 24 page AD5512A/AD5542A Rev. A | Page 8 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 12 11 10 1 3 4 DGND LDAC CLR 9 DIN VOUT AGNDS 2 AGNDF REFS TOP VIEW NC = NO CONNECT (Not to Scale) Figure 4. AD5512A/AD5542A 16-Lead LFCSP Pin Configuration 1 REF 2 CS 3 SCLK 4 DIN 5 CLR 10 GND 9 VDD 8 RFB 7 INV 6 VOUT AD5542A-1 TOP VIEW Not to Scale NOTES 1. THE EXPOSED PADDLE SHOULD BE TIED TO THE POINT OF LOWEST POTENTIAL, IN THIS CASE, GND. Figure 5. AD5542A-1 10-Lead LFCSP Pin Configuration Table 7. AD5512A/AD5542A Pin Function Descriptions Pin No. 16-Lead LFCSP 10-Lead LFCSP Mnemonic Description 1 6 V OUT Analog Output Voltage from the DAC. 2 AGNDF Ground Reference Point for Analog Circuitry (Force). 3 AGNDS Ground Reference Point for Analog Circuitry (Sense). 4 REFS Voltage Reference Input (Sense) for the DAC. Connect to an external 2.5 V reference. Reference can range from 2 V to V DD. 5 REFF Voltage Reference Input (Force) for the DAC. Connect to an external 2.5 V reference. Reference can range from 2 V to V DD. 6 2 CS Logic Input Signal. The chip select signal is used to frame the serial data input. 7 NC No Connect. 8 3 SCLK Clock Input. Data is clocked into the input register on the rising edge of SCLK. Duty cycle must be between 40% and 60%. 9 4 DIN Serial Data Input. This device accepts 16-bit words. Data is clocked into the input register on the rising edge of SCLK. 10 5 CLR Asynchronous Clear Input. The CLR input is falling edge sensitive. When CLR is low, all LDAC pulses are ignored. When CLR is activated, the DAC register is cleared to the model selectable midscale. 11 LDAC LDAC Input. When this input is taken low, the DAC register is simultaneously updated with the contents of the input register. 12 DGND Digital Ground. Ground reference for digital circuitry. 13 7 INV Connection to the Internal Scaling Resistors of the DAC. Connect the INV pin to the external op amps inverting input in bipolar mode. 14 V LOGIC Logic Power Supply. 15 9 V DD Analog Supply Voltage, 5 V ± 10%. 16 8 R FB Feedback Resistor Pin. In bipolar mode, connect this pin to the external op amp output. 1 REF Voltage Reference Input for the DAC. Connect this pin to an external 2.5 V reference. Reference can range from 2 V to V DD. 10 GND Ground. EPAD Exposed Pad The exposed pad should be tied to the point of lowest potential, in this case, GND. |
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