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AD630JCHIPS 데이터시트(PDF) 9 Page - Analog Devices

부품명 AD630JCHIPS
상세설명  Balanced Modulator/Demodulator
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AD630JCHIPS 데이터시트(HTML) 9 Page - Analog Devices

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REV. E
AD630
–8–
the system input tied to 0 V, and a switching or carrier wave-
form applied to the comparator, a low level square wave will
appear at the output. The differential offset adjustment potenti-
ometers can be used to null the amplitude of this square wave
(Pins 3 and 4). The common-mode offset adjustment can be
used to zero the residual dc output voltage (Pins 5 and 6).
These functions should be implemented using 10k trim poten-
tiometers with wipers connected directly to Pin 8 as shown in
Figures 9a and 9b.
CHANNEL STATUS OUTPUT
The channel status output, Pin 7, is an open collector output
referenced to –VS that can be used to indicate which of the two
input channels is active. The output will be active (pulled low)
when Channel A is selected. This output can also be used to
supply positive feedback around the comparator. This produces
hysteresis which serves to increase noise immunity. Figure 7
shows an example of how hysteresis may be implemented. Note
that the feedback signal is applied to the inverting (–) terminal
of the comparator to achieve positive feedback. This is because
the open collector channel status output inverts the output sense
of the internal comparator.
1M
100k
100k
–15V
+5V
100
7
8
9
10
Figure 7. Comparator Hysteresis
The channel status output may be interfaced with TTL inputs
as shown in Figure 8. This circuit provides appropriate level
shifting from the open-collector AD630 channel status output to
TTL inputs.
–15V
+5V
TTL INPUT
AD630
+15V
IN 914s
6.8k
22k
100k
2N2222
7
8
Figure 8. Channel Status—TTL Interface
APPLICATIONS: BALANCED MODULATOR
Perhaps the most commonly used configuration of the AD630 is
the balanced modulator. The application resistors provide precise
symmetric gains of
±1 and ±2. The ±1 arrangement is shown in
Figure 9a and the
±2 arrangement is shown in Figure 9b. These
cases differ only in the connection of the 10 k
Ω feedback resistor
(Pin 14) and the compensation capacitor (Pin 12). Note the use
of the 2.5 k
Ω bias current compensation resistors in these
examples. These resistors perform the identical function in the
±1 gain case. Figure 10 demonstrates the performance of the
AD630 when used to modulate a 100 kHz square wave carrier
with a 10 kHz sinusoid. The result is the double sideband sup-
pressed carrier waveform.
These balanced modulator topologies accept two inputs, a signal
(or modulation) input applied to the amplifying channels and a
reference (or carrier) input applied to the comparator.
MODULATED
OUTPUT
SIGNAL
CARRIER
INPUT
CM
ADJ
DIFF
ADJ
2.5k
AMP A
AMP B
–V
10k
10k
5k
9
10
COMP
1
15
7
16
14
13
12
2
20
+VS
–VS
AD630
A
B
2.5k
19
18
17
11
8
6
5
10k
4
3
10k
MODULATION
INPUT
Figure 9a. AD630 Configured as a Gain-of-One Balanced
Modulator
MODULATED
OUTPUT
SIGNAL
CARRIER
INPUT
CM
ADJ
DIFF
ADJ
2.5k
AMP A
AMP B
–V
10k
10k
5k
9
10
COMP
1
15
7
16
14
13
12
2
20
+VS
–VS
AD630
A
B
2.5k
19
18
17
11
8
6
5
10k
4
3
10k
MODULATION
INPUT
Figure 9b. AD630 Configured as a Gain-of-Two Balanced
Modulator
10V
5V
5V
20 s
MODULATION
INPUT
CARRIER
INPUT
OUTPUT
SIGNAL
Figure 10. Gain-of-Two Balanced Modulator Sample
Waveforms


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