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AD9266 데이터시트(PDF) 1 Page - Analog Devices |
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AD9266 데이터시트(HTML) 1 Page - Analog Devices |
1 / 32 page 16-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter Data Sheet AD9266 Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010–2012 Analog Devices, Inc. All rights reserved. FEATURES 1.8 V analog supply operation 1.8 V to 3.3 V output supply SNR 77.6 dBFS at 9.7 MHz input 71.1 dBFS at 200 MHz input SFDR 93 dBc at 9.7 MHz input 80 dBc at 200 MHz input Low power 56 mW at 20 MSPS 113 mW at 80 MSPS Differential input with 700 MHz bandwidth On-chip voltage reference and sample-and-hold circuit 2 V p-p differential analog input DNL = −0.6/+1.1 LSB Interleaved data output for reduced pin-count interface Serial port control options Offset binary, Gray code, or twos complement data format Optional clock duty cycle stabilizer Integer 1-to-8 input clock divider Built-in selectable digital test pattern generation Energy-saving power-down modes Data clock output (DCO) with programmable clock and data alignment APPLICATIONS Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA Smart antenna systems Battery-powered instruments Handheld scope meters Portable medical imaging Ultrasound Radar/LIDAR PET/SPECT imaging FUNCTIONAL BLOCK DIAGRAM VIN+ VIN– VREF SENSE OR D1_D0 D15_D14 8 DCO SDIO AGND DRVDD AVDD SCLK SPI PROGRAMMING DATA VCM RBIAS PDWN DFS CLK+ CLK– MODE CONTROLS DUTY CYCLE STABILIZER DIVIDE 1 TO 8 MODE CSB REF SELECT ADC CORE AD9266 Figure 1. PRODUCT HIGHLIGHTS 1. The AD9266 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families. 2. The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use. 3. A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO and data output (D15_D14 to D1_D0) timing and offset adjustments, and voltage reference modes. 4. The AD9266 is packaged in a 32-lead RoHS-compliant LFCSP that is pin compatible with the AD9609 10-bit ADC, the AD9629 12-bit ADC, and the AD9649 14-bit ADC, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 80 MSPS. |
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