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AM3894CCYG120 데이터시트(PDF) 1 Page - Texas Instruments

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부품명 AM3894CCYG120
상세설명  AM389x Sitara ARM Processors
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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AM3894
AM3892
www.ti.com
SPRS681E – OCTOBER 2010 – REVISED JULY 2012
AM389x Sitara™
ARM® Processors
Check for Samples: AM3894, AM3892
1
Device Summary
1.1
Features
1234567891011
– Simultaneous SD and HD Analog Output
• High-Performance Sitara™ ARM® Processors
– Digital HDMI 1.3 transmitter with PHY with
– ARM® Cortex™-A8 RISC Processor
HDCP up to 165-MHz pixel clock
Up to 1.35 GHz
– Advanced Video Processing Features Such
• ARM® Cortex™-A8 Core
as Scan/Format/Rate Conversion
– ARMv7 Architecture
– Three Graphics Layers and Compositors
In-Order, Dual-Issue, Superscalar
• Dual 32-bit DDR2/3 SDRAM Interfaces
Processor Core
– Supports up to DDR2-800 and DDR3-1600
NEON™ Multimedia Architecture
– Up to Eight x8 Devices Total
– Supports Integer and Floating Point (VFPv3-
– 2 GB Total Address Space
IEEE754 compliant)
– Dynamic Memory Manager (DMM)
Jazelle® RCT Execution Environment
Programmable Multi-Zone Memory
• ARM® Cortex™-A8 Memory Architecture
Mapping and Interleaving
– 32K-Byte Instruction and Data Caches
Enables Efficient 2D Block Accesses
– 256K-Byte L2 Cache
Supports Tiled Objects in 0°, 90°, 180°, or
– 64K-Byte RAM, 48K-Byte Boot ROM
270 Orientation and Mirroring
• 512K-Bytes On-Chip Memory Controller
Optimizes Interlaced Accesses
(OCMC) RAM
• One PCI Express® (PCIe®) 2.0 Port With
• SGX530 3D Graphics Engine (available only on
Integrated PHY
the AM3894 device)
– Single Port With 1 or 2 Lanes at 5.0 GT/s
– Delivers up to 30 MTriangles/s
– Configurable as Root Complex or Endpoint
– Universal Scalable Shader Engine
• Serial ATA (SATA) 3.0 Gbps Controller With
– Direct3D® Mobile, OpenGL® ES 1.1 and 2.0,
Integrated PHYs
OpenVG™ 1.1, OpenMax™ API Support
– Direct Interface for Two Hard Disk Drives
– Advanced Geometry DMA Driven Operation
– Hardware-Assisted Native Command
– Programmable HQ Image Anti-Aliasing
Queuing (NCQ) from up to 32 Entries
• Endianness
– Supports Port Multiplier and Command-
– ARM Instructions/Data – Little Endian
Based Switching
• HD Video Processing Subsystem (HDVPSS)
• Two 10/100/1000 Mbps Ethernet MACs (EMAC)
– Two 165 MHz HD Video Capture Channels
– IEEE 802.3 Compliant (3.3V I/O Only)
One 16/24-bit and One 16-bit Channel
– MII and GMII Media Independent I/Fs
Each Channel Splittable Into Dual 8-bit
– Management Data I/O (MDIO) Module
Capture Channels
• Dual USB 2.0 Ports With Integrated PHYs
– Two 165 MHz HD Video Display Channels
– USB 2.0 High-/Full-Speed Client
One 16/24/30-Bit and One 16-bit Channel
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
Sitara, SmartReflex, Code Composer Studio, DSP/BIOS, XDS are trademarks of Texas Instruments.
3
Cortex, NEON are trademarks of ARM Ltd or its subsidiaries.
4
ARM, Jazelle, Thumb are registered trademarks of ARM Ltd or its subsidiaries.
5
USSE, POWERVR are trademarks of Imagination Technologies Limited.
6
OpenVG, OpenMax are trademarks of Khronos Group Inc.
7
Direct3D, Microsoft, Windows are registered trademarks of Microsoft Corporation in the United States and/or other countries.
8
I2C BUS is a registered trademark of NXP B.V. Corporation Netherlands.
9
PCI Express, PCIe are registered trademarks of PCI-SIG.
10
OpenGL is a registered trademark of Silicon Graphics International Corp. or its subsidiaries in the United States and/or other
countries.
11
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to
Copyright © 2010–2012, Texas Instruments Incorporated
specifications per the terms of the Texas Instruments standard warranty. Production
processing does not necessarily include testing of all parameters.


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