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AD7528LN 데이터시트(PDF) 5 Page - Analog Devices |
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AD7528LN 데이터시트(HTML) 5 Page - Analog Devices |
5 / 8 page AD7528 REV. B –5– Table I. Unipolar Binary Code Table DAC Latch Contents Analog Output MSB LSB (DAC A or DAC B) 1 1 1 1 1 1 1 1 –V IN 255 256 1 0 0 0 0 0 0 1 –V IN 129 256 1 0 0 0 0 0 0 0 –V IN 128 256 =− V IN 2 0 1 1 1 1 1 1 1 –V IN 127 256 0 0 0 0 0 0 0 1 –V IN 1 256 0 0 0 0 0 0 0 0 –V IN 0 256 = 0 Note: 1 LSB = 2 −8 () V IN () = 1 256 V IN () Table II. Bipolar (Offset Binary) Code Table DAC Latch Contents Analog Output MSB LSB (DAC A or DAC B) 1 1 1 1 1 1 1 1 +V IN 127 128 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 –V IN 1 128 0 0 0 0 0 0 0 1 –V IN 127 128 0 0 0 0 0 0 0 0 –V IN 128 128 Note: 1 LSB = 2 −7 () V IN () = 1 128 V IN () Table III. Recommended Trim Resistor Values vs. Grade Trim Resistor J/A/S K/B/T L/C/U R1; R3 1 k 500 200 R2; R4 330 150 82 VIN A (± 10V) AD7528 VIN B (± 10V) RFB B AGND VDD DB0 DB7 DATA INPUTS DAC A/ DAC B CS WR DGND CONTROL LOGIC INPUT BUFFER OUT B LATCH R41 DAC B C22 R31 DAC A LATCH VOUT B AGND RFB A OUT A R21 C12 VOUT A AGND R11 NOTES: 1R1, R2 AND R3, R4 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED. SEE TABLE III FOR RECOMMENDED VALUES. 2C1, C2 PHASE COMPENSATION (10pF–15pF) IS REQUIRED WHEN USING HIGH SPEED AMPLIFIERS TO PREVENT RINGING OR OSCILLATION. Figure 4. Dual DAC Unipolar Binary Operation (2 Quadrant Multiplication); See Table I VIN A (± 10V) AD7528 VIN B (± 10V) RFB B AGND VDD DB0 DB7 DATA INPUTS DAC A/ DAC B CS WR DGND CONTROL LOGIC INPUT BUFFER OUT B LATCH R41 DAC B C23 R31 DAC A LATCH VOUT B AGND RFB A OUT A R21 C13 VOUT A AGND R11 A1 R72 10k R62 20k A2 R5 20k R11 5k AGND R102 20k R92 10k A4 R8 20k R12 5k AGND A3 NOTES: 1R1, R2 AND R3, R4 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED. SEE TABLE III FOR RECOMMENDED VALUES. ADJUST R1 FOR VOUT A = 0V WITH CODE 10000000 IN DAC A LATCH. ADJUST R3 FOR VOUT B = 0V WITH CODE 10000000 IN DAC B LATCH. 2MATCHING AND TRACKING IS ESSENTIAL FOR RESISTOR PAIRS R6, R7 AND R9, R10. 3C1, C2 PHASE COMPENSATION (10pF–15pF) MAY BE REQUIRED IF A1/A3 IS A HIGH SPEED AMPLIFIER. Figure 5. Dual DAC Bipolar Operation (4 Quadrant Multiplication); See Table II |
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