REV. 0

AD7738

–7–

PIN FUNCTION DESCRIPTION

Pin No.

Mnemonic

Description

1

SCLK

Serial Clock. Schmitt-Triggered Logic Input. An external serial clock is applied to this input to transfer

serial data to or from the AD7738.

2

MCLKIN

Master Clock Signal for the ADC. This can be provided in the form of a crystal/resonator or external

clock. A crystal/resonator can be tied across the MCLKIN and MCLKOUT pins. Alternatively, the MCLKIN

pin can be driven with a CMOS compatible clock and MCLKOUT left unconnected.

3MCLKOUT

When the master clock for the device is a crystal/resonator, the crystal/resonator is connected between

MCLKIN and MCLKOUT. If an external clock is applied to the MCLKIN, MCLKOUT provides an

inverted clock signal or can be switched off to lower the device power consumption. MCLKOUT is

capable of driving one CMOS load.

4

CS

Chip Select. Active low Schmitt triggered logic input with an internal pull-up resistor. With this input

hardwired low, the AD7738 can operate in its 3-wire interface mode using SCLK, DIN, and DOUT.

CS

can be used to select the device in systems with more than one device on the serial bus. It can also be used as

an 8-bit frame synchronization signal.

5

RESET

Schmitt-Triggered Logic Input. Active low input that resets the control logic, interface logic, digital filter,

analog modulator, and all on-chip registers of the part to power-on status. Effectively, everything on the

part except the clock oscillator is reset when the

RESET pin is exercised.

Analog Positive Supply Voltage. 5 V to AGND nominal.

7

AINCOM/P0

Analog Inputs Common Terminal/Digital Output. The pin is determined by the P0 Dir bit; the digital

value can be written as the P0 bit in the I/O Port register. The digital voltage is referenced to analog

supplies. When configured as an input (P0 Dir bit set to 1), the single-ended Analog Inputs 0 to 7 can be

referenced to this pin’s voltage level.

8

SYNC/P1

SYNC/Digital Input/Digital Output. The pin direction is determined by the P1 Dir bit; the digital value

can be read/written as the P1 bit in the I/O Port register. When the SYNC Enable bit in the I/O Port

register is set to 1, the

SYNC/P1 pin can be used to synchronize the AD7738 modulator and digital filter

with other devices in the system. The digital voltage is referenced to the analog supplies. When configured

as an input, the pin should be tied high or low.

9–12,

AIN0–AIN7

Analog Inputs

17–20

13

MUXOUT(+) Analog Multiplexer Positive Output

14

MUXOUT(–)

Analog Multiplexer Negative Output

PIN CONFIGURATION

TOP VIEW

(Not to Scale)

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

AD7738

SCLK

DGND

MCLKIN

MCLKOUT

DIN

CS

DOUT

RESET

RDY

AGND

AINCOM/P0

REFIN(–)

SYNC/P1

REFIN(+)

AIN7

AIN0

AIN6

AIN1

AIN5

AIN2

AIN4

AIN3

MUXOUT(+)

ADCIN(+)

MUXOUT(–)

ADCIN(–)