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TMP006BIYZFR 데이터시트(PDF) 2 Page - Texas Instruments |
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TMP006BIYZFR 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 21 page TMP006 TMP006B SBOS518C – MAY 2011 – REVISED DECEMBER 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE INFORMATION(1) TWO-WIRE PACKAGE PACKAGE PRODUCT INTERFACE VOLTAGE PACKAGE-LEAD DESCRIPTION DESIGNATOR TMP006 3.3 V WCSP-8 1,6-mm × 1,6-mm WCSP YZF TMP006B 1.8 V WCSP-8 1,6-mm × 1,6-mm WCSP YZF (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) VALUE MIN MAX UNIT Supply voltage V+ 7 V Input voltage ADR1 pins –0.5 VS + 0.5 V Input voltage SDA, SCL, DRDY, ADR0 pins –0.5 7 V Input current 10 mA Operating temperature range –55 +125 °C Storage temperature range –65 +150 °C Junction temperature (TJ max) +150 °C Human body model (HBM) 2000 V ESD rating: Charged device model (CDM) 500 V Machine model (MM) 200 V (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. THERMAL INFORMATION TMP006 TMP006B THERMAL METRIC(1) UNITS YZF 8 PINS θJA Junction-to-ambient thermal resistance 123.8 θJCtop Junction-to-case (top) thermal resistance 69 θJB Junction-to-board thermal resistance 103 °C/W ψJT Junction-to-top characterization parameter 4.7 ψJB Junction-to-board characterization parameter 55 θJCbot Junction-to-case (bottom) thermal resistance n/a (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Links: TMP006 TMP006B |
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