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DM385AAARD21F 데이터시트(PDF) 5 Page - Texas Instruments |
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DM385AAARD21F 데이터시트(HTML) 5 Page - Texas Instruments |
5 / 280 page System Interconnect Serial Interfaces Program/Data Storage Connectivity ARM Subsystem 32 KB D-Cache 256 KB L2 Cache with ECC NEON FPU Cortex -A8 CPU TM ICE Crusher RAM 64 KB Boot ROM 48 KB 32 KB I-Cache Imaging Subsystem Resizer Parallel Cam Input Video Processing Subsystem Video Capture Display Processing HD OSD SD OSD HD VENC SD VENC HDMI Xmt SD DAC HD DAC (3) MDIO PCIe 2.0 (One x1 Port) (2) EMAC (R)(G)MII (2) USB 2.0 Ctrl/PHY (2) GPMC + ELM MMC/SD/ SDIO (3) DDR2/3 32-bit McASP (2) SPI (4) UART (3) I C (4) 2 System Control Real-Time Clock PRCM GP Timer (8) JTAG Watchdog Timer Mailbox Spinlock CSI2 Serial Input IPIPE H3A Peripherals Miscellaneous GPIO (4) DM385, DM388 www.ti.com SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 1.4 Functional Block Diagram Figure 1-1 shows the functional block diagram of the device. (1) Noise Filtering Engine is available only on DM388. (2) PCIe is supported on all DM385 devices and also on DM388 devices with PCIe enabled. Figure 1-1. Functional Block Diagram Copyright © 2013, Texas Instruments Incorporated High-Performance System-on-Chip (SoC) 5 Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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