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ADC083000 데이터시트(PDF) 3 Page - Texas Instruments |
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ADC083000 데이터시트(HTML) 3 Page - Texas Instruments |
3 / 48 page GND VA OUTV/SCLK OutEdge/DDR/SDATA VA GND VCMO GND VIN- VIN+ GND 12 16 FSR/ECE CLK+ CLK- GND DCLK_RST+ DCLK_RST- GND PD GND ADC083000 20 24 28 CAL VBG REXT 32 31 30 29 27 26 25 23 22 21 19 18 17 15 14 13 11 10 1 4 8 9 7 6 5 3 2 Dc7+ Dc7- OR+ OR- DCLK- DCLK+ Dd7- Dd7+ Dd6- Dd6+ DR GND Dd5- Dd5+ Dd4- Dd4+ Dd3- Dd3+ Dd2- Dd2+ 71 81 86 91 96 Dc4+ Dc4- Dc5+ Dc5- DR GND Dc6+ Dc6- Dc2+ Dc2- Dc3+ Dc3- 76 66 65 67 68 69 70 73 72 74 75 78 77 79 80 83 82 84 85 88 87 89 90 93 92 94 95 VA VA VA NC VA VA VA VA DCLK_RST VDR VDR ADC083000 Exposed pad bottom side. (See Note below.) ADC083000 www.ti.com SNAS358N – JUNE 2006 – REVISED JULY 2009 Pin Configuration NOTE The exposed pad on the bottom of the package must be soldered to a ground plane to ensure rated performance. Copyright © 2006–2009, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: ADC083000 |
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