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74LVC821A 데이터시트(PDF) 2 Page - NXP Semiconductors |
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2 / 20 page 74LVC821A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 4 — 23 November 2012 2 of 20 NXP Semiconductors 74LVC821A 10-bit D-type flip-flop; 5 V tolerance; positive-edge trigger; 3-state 3. Ordering information 4. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC821AD 40 C to +125 C SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 74LVC821ADB 40 C to +125 C SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1 74LVC821APW 40 C to +125 C TSSOP24 plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1 74LVC821ABQ 40 C to +125 C DHVQFN24 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 5.5 0.85 mm SOT815-1 Fig 1. Logic symbol Fig 2. IEC logic symbol 001aaa677 D0 D1 D2 D3 D4 D5 D6 D9 OE CP Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q9 13 1 14 17 18 19 20 21 22 23 11 8 7 D7 D8 Q7 Q8 15 16 10 9 6 5 4 3 2 001aaa678 14 17 18 19 20 21 22 13 C1 1 EN 1D 23 11 8 7 6 5 4 3 2 16 9 15 10 |
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