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FDD86113LZ 데이터시트(PDF) 1 Page - Fairchild Semiconductor |
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FDD86113LZ 데이터시트(HTML) 1 Page - Fairchild Semiconductor |
1 / 6 page June 2013 ©2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDD86113LZ Rev. C1 FDD86113LZ N-Channel Shielded Gate PowerTrench® MOSFET 100 V, 5.5 A, 104 m Ω Features Shielded Gate MOSFET Technology Max rDS(on) = 104 mΩ at VGS = 10 V, ID = 4.2 A Max rDS(on) = 156 mΩ at VGS = 4.5 V, ID = 3.4 A HBM ESD protection level > 6 kV typical (Note 4) High performance trench technology for extremely low rDS(on) High power and current handling capability in a widely used surface mount package 100% UIL Tested RoHS Compliant General Description This N-Channel logic Level MOSFETs are produced using Fairchild Semiconductor‘s advanced PowerTrench® process that incorporates Shielded Gate technology. This process has been optimized for the on-state resistance and yet maintain superior switching performance. G-S zener has been added to enhance ESD voltage level. Application DC-DC conversion S G D G S D TO -2 52 D-P A K (T O -25 2) MOSFET Maximum Ratings T C = 25 °C unless otherwise noted Thermal Characteristics Package Marking and Ordering Information Symbol Parameter Ratings Units VDS Drain to Source Voltage 100 V VGS Gate to Source Voltage ±20 V ID Drain Current -Continuous TC = 25 °C 5.5 A -Continuous TA = 25 °C (Note 1a) 4.2 -Pulsed 15 EAS Single Pulse Avalanche Energy (Note 3) 12 mJ PD Power Dissipation TC = 25 °C 29 W Power Dissipation TA = 25 °C (Note 1a) 3.1 TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C RθJC Thermal Resistance, Junction to Case (Note 1) 4.3 °C/W RθJA Thermal Resistance, Junction to Ambient (Note 1a) 96 Device Marking Device Package Reel Size Tape Width Quantity FDD86113LZ FDD86113LZ D-PAK(TO-252) 13 ’’ 12 mm 2500 units |
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