전자부품 데이터시트 검색엔진 |
|
ADP1650ACPZ-R7 데이터시트(PDF) 6 Page - Analog Devices |
|
ADP1650ACPZ-R7 데이터시트(HTML) 6 Page - Analog Devices |
6 / 32 page ADP1650 Rev. C | Page 6 of 32 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Rating VIN, SDA, SCL, EN, GPIO1, GPIO2, STROBE, LED_OUT, SW, VOUT to Power Ground −0.3 V to +6 V PGND to SGND −0.3 V to +0.3 V Ambient Temperature Range (TA) −40°C to +85°C Junction Temperature Range (TJ) −40°C to +125°C Storage Temperature JEDEC J-STD-020 ESD Human Body Model ±2000 V ESD Charged Device Model ±500 V ESD Machine Model ±150 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL DATA The ADP1650 may be damaged if the junction temperature limits are exceeded. Monitoring TA does not guarantee that TJ is within the specified temperature limits. In applications with high power dissipation and poor thermal resistance, the maximum TA may have to be derated. In applications with moderate power dissipation and low PCB thermal resistance, the maximum TA can exceed the maximum limit as long as the TJ is within speci- fication limits. TJ of the device is dependent on the TA, the power dissipation (PD) of the device, and the junction-to-ambient thermal resistance (θJA) of the package. Maximum TJ is calculated from the TA and PD using the following formula: TJ = TA + (PD × θJA) THERMAL RESISTANCE θJA of the package is based on modeling and calculation using a 4-layer board. θJA is highly dependent on the application and board layout. In applications where high maximum power dissi- pation exists, attention to thermal board design is required. The value of θJA may vary, depending on PCB material, layout, and environmental conditions. The specified value of θJA is based on a 4-layer, 4 in × 3 in, 2 ½ oz copper board, per JEDEC standards. For more information, see the AN-617 Application Note, MicroCSP™ Wafer Level Chip Scale Package. θJA is specified for a device mounted on a JEDEC 2S2P PCB. Table 5. Thermal Resistance Package Type θJA Unit 12-Ball WLCSP 75 °C/W 10-Lead LFCSP 42.5 °C/W ESD CAUTION |
유사한 부품 번호 - ADP1650ACPZ-R7 |
|
유사한 설명 - ADP1650ACPZ-R7 |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |