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TS68C429AVR 데이터시트(PDF) 8 Page - ATMEL Corporation |
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TS68C429AVR 데이터시트(HTML) 8 Page - ATMEL Corporation |
8 / 43 page 8 TS68C429A 2120A–HIREL–08/02 This device contains protective circuitry against damage due to high static voltages or electrical fields: however, it is advised that normal precautions be taken to avoid applica- tion of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic volt- age level (e.g., either GND or VCC). Figure 3. Clock Input Timing Diagram Note: Timing measurements are referenced to and from a low of 0.8-volt and a high voltage of 2.25 volts, unless otherwise noted. The voltage swing through this range should start outside and pass through the range such that the rise or fall will be linear between 0.8-volt and 2.25 volts. Unless otherwise stated, all voltages are referenced to the reference terminal. Table 2. Recommended Condition of Use Symbol Parameter Test conditions Min Max Units VCC Supply Voltage 4.5 5.5 V V IL Low Level Input Voltage -0.5 0.8 V V IH High Level Input Voltage 2.25 5.8 V Tcase Operating Temperature M suffix -55 +125 °C V suffix -40 +85 °C C L Output Loading Capacitance 130 pF t r(c) Clock Rise Time (See Figure 3) 5 ns t f(c) Clock Fall Time (See Figure 3) 5 ns f c Clock System Frequency (See Figure 3) 0.5 20 MHz Table 3. Thermal Characteristics Package Symbol Parameter Value Unit PGA 68 θ J-A Thermal Resistance Junction-to-ambient 28 °C/W θ J-C Thermal Resistance Junction-to-case 2 °C/W CQFP 132 θ J-A Thermal Resistance Junction-to-ambient 27 °C/W θ J-C Thermal Resistance Junction-to-case 3 °C/W 0.8V 2.25V tcyc tCL tCH tCF tCR |
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