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BS616LV2013 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 6 Page - Brilliance Semiconductor

๋ถ€ํ’ˆ๋ช… BS616LV2013
์ƒ์„ธ๋‚ด์šฉ  Very Low Power/Voltage CMOS SRAM 128K X 16 bit
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BS616LV2013 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 6 Page - Brilliance Semiconductor

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Revision 2.5
April 2002
6
JEDEC
PARAMETER
NAME
PARAMETER
NAME
DESCRIPTION
BS616LV2013-70
MIN. TYP. MAX.
BS616LV2013-10
MIN. TYP. MAX.
UNIT
t
AVAX
Write Cycle Time
t
WC
70
--
--
100
--
--
ns
t
E1LWH
t
CW
Chip Select to End of Write
70
--
--
100
--
--
ns
t
AVWL
t
AS
Address Setup Time
0
--
--
0
--
--
ns
t
AVWH
t
AW
Address Valid to End of Write
70
--
--
100
--
--
ns
t
WLWH
t
WP
Write Pulse Width
35
--
--
50
--
--
ns
t
WHAX
t
WR
Write recovery Time
(CE,WE)
0
--
--
0
--
--
ns
t
BW
t
BW
Date Byte Control to End of Write
(LB,U )
30
B
----
40
----
ns
t
WLQZ
t
WHZ
Write to Output in High Z
0--
30
0
--
40
ns
t
DVWH
t
DW
Data to Write Time Overlap
30
--
--
40
--
--
ns
t
WHDX
t
DH
Data Hold from Write Time
0
--
--
0
--
--
ns
t
GHQZ
t
OHZ
Output Disable to Output in High Z
0--
30
0
--
40
ns
t
WHOX
t
OW
End of Write to Output Active
5
----
10
----
ns
R0201-BS616LV2013
AC ELECTRICAL CHARACTERISTICS ( TA = 0 to + 70oC , Vcc = 3.0V )
WRITE CYCLE
BSI
BS616LV2013
t WR
SWITCHING WAVEFORMS (WRITE CYCLE)
WRITE CYCLE1 (1)
t WC
(3)
t CW
(11)
t BW
(2)
t WP
t AW
t OHZ
(4,10)
t AS
(3)
t DH
t DW
D
IN
D
OUT
WE
LB,UB
CE
OE
ADDRESS
(5)
1. tBW is 30ns/40ns (@speed=70ns/100ns) with address toggle. ; tBW is 70ns/100ns (@speed=70ns/100ns) without address toggle.
NOTE :
(1)


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