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LMC6462BIMNOPB 데이터시트(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 LMC6462BIMNOPB
상세설명  LMC6462 Dual/LMC6464 Quad Micropower, Rail-to-Rail Input and Output CMOS
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

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LMC6462, LMC6464
SNOS725D – MAY 1999 – REVISED MARCH 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2) (3)
ESD Tolerance(4)
2.0 kV
Differential Input Voltage
±Supply Voltage
Voltage at Input/Output Pin
(V+) + 0.3V, (V)
− 0.3V
Supply Voltage (V+
− V)
16V
Current at Input Pin(5)
±5 mA
Current at Output Pin(6)(7)
±30 mA
Current at Power Supply Pin
40 mA
Lead Temp. (Soldering, 10 sec.)
260°C
Storage Temperature Range
−65°C to +150°C
Junction Temperature(8)
150°C
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
(2)
For specified Military Temperature Range parameters see RETSMC6462/4X.
(3)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(4)
Human body model, 1.5 k
Ω in series with 100 pF. All pins rated per method 3015.6 of MIL-STD-883. This is a class 2 device rating.
(5)
Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
(6)
Applies to both single supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
(7)
Do not short circuit output to V+, when V+ is greater than 13V or reliability will be adversely affected.
(8)
The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) − TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Operating Ratings
Supply Voltage
3.0V
≤ V+ ≤ 15.5V
Junction Temperature
LMC6462AM, LMC6464AM
−55°C ≤ TJ ≤ +125°C
Range
LMC6462AI, LMC6464AI
−40°C ≤ TJ ≤ +85°C
LMC6462BI, LMC6464BI
−40°C ≤ TJ ≤ +85°C
Thermal Resistance (
θJA)
P Package, 8-Pin PDIP
115°C/W
D Package, 8-Pin SOIC
193°C/W
NFF Package, 14-Pin PDIP
81°C/W
D Package, 14-Pin SOIC
126°C/W
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
5V DC Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C, V
+ = 5V, V= 0V, V
CM = VO = V
+/2 and R
L > 1M. Boldface limits
apply at the temperature extremes.
Typ(1)
LMC6462AI
LMC6462BI
LMC6462AM
Symbol
Parameter
Conditions
LMC6464AI
LMC6464BI
LMC6464AM
Units
Limit(2)
Limit(2)
Limit(2)
VOS
Input Offset Voltage
0.25
0.5
3.0
0.5
mV
1.2
3.7
1.5
max
TCVOS
Input Offset Voltage
1.5
μV/°C
Average Drift
IB
Input Current
See(3)
0.15
10
10
200
pA max
(1)
Typical Values represent the most likely parametric norm.
(2)
All limits are specified by testing or statistical analysis.
(3)
Specified limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value.
2
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Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: LMC6462 LMC6464


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