CS51021EDR16 datasheet(5/9 Pages) CHERRY

부품명	CS51021EDR16

상세설명	Enhanced Current Mode PWM Controller

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제조업체	CHERRY [Cherry Semiconductor Corporation]

홈페이지	http://www.cherrycorp.com/

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5

Package Pin Description: continued

PACKAGE PIN #

PIN SYMBOL

FUNCTION

+

-

4.75V

VREF

DISABLE

1.33

55µA

VREF = 5V

OSC

Discharge

Latch

2.5V

PWM

Comp

S

R

Q

+

E/A

+

–

START

STOP

+

-

ISET

Clamp

SS

Clamp

12.5µA

OV

Monitor

UV

Monitor

∑

+

–

0.1V

0.1

+

–

VREF

53µA

2V

VREF_OK

Vcc_OK

SS

Monitor

VFB

Monitor

+

–

1.45V

55ns

Blank

×

0.8

10k

20k

VREF

13.5V

VISense

2.5V

4.3V

200ns

G1

F1

G2

D1

Q2

G3

FAULT

ZD1

D4

+

–

4.7V

D2

D3

SS

PGnd

VC

GATE

ISENSE

SLOPE

COMP

VFB

OV

ISET

VREF

VCC

LGnd

SYNC

RTCT

UV

×

G4

×

SLEEP

2nd

Threshold

Figure 1: CS51021/22/23/24 Block Diagram

Block Diagram

16L PDIP & SO Narrow

7RTCT

Timing resistor RT and capacitor CT determine oscillator frequen-

cy and maximum duty cycle, DMAX.

8ISET

Voltage at this pin sets pulse-by-pulse overcurrent threshold, and

second threshold (1.33 times higher) with Soft Start retrigger (hic-

cup mode).

9VFB

Feedback voltage input. Connected to the error amplifier invert-

ing input.

10

COMP

Error amplifier output. Frequency compensation network is usu-

ally connected between COMP and VFB pins.

11

SS

Charging external capacitor restricts error amplifier output volt-

age during the start or fault conditions (hiccup).

12

LGnd

Logic ground.

13

VREF

5.0V reference voltage output.

14

VCC

Logic supply voltage.

15

PGnd

Output power stage ground connection.

16

VC

Output power stage supply voltage.

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제조업체	부품명	데이터시트	상세설명
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