전자부품 데이터시트 검색엔진 |
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CS51221 데이터시트(PDF) 6 Page - Cherry Semiconductor Corporation |
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CS51221 데이터시트(HTML) 6 Page - Cherry Semiconductor Corporation |
6 / 12 page Typical Performance Characteristics 6 Package Pin Description PACKAGE PIN # PIN SYMBOL FUNCTION Block Diagram 3.1V VREF DISABLE FF Discharge 50µA VREF = 3.3V OSC S R Q 150ns Blank 13.5V SS PGnd VC GATE ISENSE COMP VFB I SET VREF VCC SYNC RTCT OV ENABLE VBG FF Latching Discharge 1V UV Monitor 2V UVL 2mA(maximum load current) Low Sat Gate Driver Thermal Shutdown + - EAMP ILIM G 3 G4 OV Monitor Max SS Det (Sat Sense) 3.0V UV PWM Comp VREF OK UV Lockout Start/Stop G1 3.3V VO Off 5µA SS to 1.8V Max (Sat Sense) Max Duty Cycle 3.0V LGnd 2V to 1V Trip Points Q (1.263V) Soft Start Clamp ON G2 16L PDIP & 16L SO Narrow 1 GATE External power switch driver with 1.0A peak capability. Rail to rail output occurs when the capacitive load is between 470pF and 10nF. 2ISENSE Current sense comparator input. 3 SYNC Bidirectional synchronization. Locks to highest frequency. 4 FF PWM ramp. 5 UV Undervoltage protection monitor. 6 OV Overvoltage protection monitor. 7RT/CT Timing resistor RT and capacitor CT determine oscillator frequency and maximum duty cycle, DMAX. 8ISET Voltage at this pin sets pulse-by-pulse overcurrent threshold. 9VFB Feedback voltage input. Connected to the error amplifier inverting input. 10 COMP Error amplifier output. 11 SS Charging external capacitor restricts error amplifier output voltage during the power up or fault conditions. 12 LGnd Logic Ground. 13 VREF 3.3V reference voltage output. Decoupling capacitor can be selected from 0.01µF to 10µF. 14 VCC Logic supply voltage. 15 PGnd Output power stage ground. 16 VC Output power stage supply voltage. |
유사한 부품 번호 - CS51221 |
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유사한 설명 - CS51221 |
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