전자부품 데이터시트 검색엔진 |
|
CDB4341A 데이터시트(PDF) 11 Page - Cirrus Logic |
|
CDB4341A 데이터시트(HTML) 11 Page - Cirrus Logic |
11 / 32 page CS4341A DS582PP1 11 3.9 Control Port Interface The control port is used to load all the internal register settings (see section 5). The operation of the control port may be completely asynchronous with the audio sample rate. However, to avoid potential interference problems, the control port pins should remain static if no operation is required. The control port operates in one of two modes: I2C or SPI. Notes: MCLK must be applied during all I2C communication. 3.9.1 MAP Auto Increment The device has MAP (memory address pointer) auto increment capability enabled by the INCR bit (also the MSB) of the MAP. If INCR is set to 0, MAP will stay constant for successive I2C writes or reads, and SPI writes. If INCR is set to 1, MAP will auto increment after each byte is written, allowing block reads or writes of successive registers. 3.9.2 I 2C Mode In the I2C mode, data is clocked into and out of the bi-directional serial control data line, SDA, by the serial control port clock, SCL (see Figure 6 for the clock to data relationship). There is no CS pin. Pin AD0 enables the user to alter the chip address (001000[AD0][R/W]) and should be tied to VA or GND as required, before powering up the device. If the device ever detects a high to low transition on the AD0/CS pin after power-up, SPI mode will be selected. 3.9.2a I 2C Write To write to the device, follow the procedure below while adhering to the control port Switching Specifications in section 7. 1) Initiate a START condition to the I2C bus followed by the address byte. The upper 6 bits must be 001000. The seventh bit must match the setting of the AD0 pin, and the eighth must be 0. The eighth bit of the address byte is the R/W bit. 2) Wait for an acknowledge (ACK) from the part, then write to the memory address pointer, MAP. This byte points to the register to be written. 3) Wait for an acknowledge (ACK) from the part, then write the desired data to the register pointed to by the MAP. 4) If the INCR bit (see section 3.9.1) is set to 1, repeat the previous step until all the desired registers are written, then initiate a STOP condition to the bus. 5) If the INCR bit is set to 0 and further I 2C writes to other registers are desired, it is nec- essary to initiate a repeated START condition and follow the procedure detailed from step 1. If no further writes to other registers are desired, initiate a STOP condition to the bus. |
유사한 부품 번호 - CDB4341A |
|
유사한 설명 - CDB4341A |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |