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74LVC86APW 데이터시트(PDF) 7 Page - List of Unclassifed Manufacturers

부품명 74LVC86APW
상세설명  Quad 2-input EXCLUSIVE-OR gate
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74LVC86A_5
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 05.00 — 15 May 2006
7 of 15
Philips Semiconductors
74LVC86A
Quad 2-input EXCLUSIVE-OR gate
[1]
Typical values are measured at Tamb =25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2]
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[3]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz,
fo = output frequency in MHz,
CL = output load capacitance in pF,
VCC = supply voltage in Volts,
N = number of inputs switching,
Σ(CL × VCC2 × fo) = sum of the outputs.
11. AC waveforms
Tamb = 25 °C
CPD
power dissipation capacitance
per gate.
VI = GND to VCC
[3]
VCC = 1.65 V to 1.95 V
-
13
-
pF
VCC = 2.3 V to 2.7 V
-
16
-
pF
VCC = 3.0 V to 3.6 V
-
20
-
pF
Table 7:
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol
Parameter
Conditions
Min
Typ[1]
Max
Unit
VM =1.5 V atVCC ≥ 2.7 V;
VM =0.5 × VCC at VCC <2.7 V;
VOL and VOH are typical output voltage drops that occur with the output load.
Fig 6.
The inputs nA and nB to output nY propagation delay
mna224
nA, nB input
nY output
tPLH
tPHL
GND
VI
VM
VM
VOH
VOL


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