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SI8452 데이터시트(PDF) 10 Page - List of Unclassifed Manufacturers |
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SI8452 데이터시트(HTML) 10 Page - List of Unclassifed Manufacturers |
10 / 36 page Si8450/51/52/55 10 Rev. 1.5 10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs) Si8450Bx, Si8455Bx VDD1 VDD2 — — 4.3 4.8 6.5 6.7 mA Si8451Bx VDD1 VDD2 — — 4.4 5.0 6.2 7.0 mA Si8452Bx VDD1 VDD2 — — 4.6 4.8 6.4 6.7 mA 100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs) Si8450Bx, Si8455Bx VDD1 VDD2 — — 4.4 16.8 6.6 21 mA Si8451Bx VDD1 VDD2 — — 6.9 14.5 8.6 18.1 mA Si8452Bx VDD1 VDD2 — — 9.5 12 11.9 15 mA Timing Characteristics Si845xAx Maximum Data Rate 0 — 1.0 Mbps Minimum Pulse Width — — 250 ns Propagation Delay tPHL,tPLH See Figure 2 — — 35 ns Pulse Width Distortion |tPLH - tPHL| PWD See Figure 2 — — 25 ns Propagation Delay Skew2 tPSK(P-P) — — 40 ns Channel-Channel Skew tPSK — — 35 ns Table 4. Electrical Characteristics (Continued) (VDD1 = 3.3 V±10%, VDD2 = 3.3 V±10%, TA = –40 to 125 °C) Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. 2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same supply voltages, load, and ambient temperature. 3. See "3. Errata and Design Migration Guidelines" on page 26 for more details. 4. Start-up time is the time period from the application of power to valid data at the output. |
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